An E-Band 21-dB Variable-Gain Amplifier with 0.5-V Supply in 40-nm CMOS

Abstract

This paper presents a variable-gain amplifier (VGA) in the 68–78 GHz range. To reduce DC power consumption, the drain voltage was set to 0.5 V with competitive performance in the gain and the noise figure. High-Q shunt capacitors were employed at the gate terminal of the core transistors to move input matching points for easy matching with a compact transformer. The four stages amplifier fabricated in 40-nm bulk complementary metal oxide semiconductor (CMOS) showed a peak gain of 24.5 dB at 71.3 GHz and 3‑dB bandwidth of more than 10 GHz in 68–78 GHz range with approximately 4.8-mW power consumption per stage. Gate-bias control of the second stage in which feedback capacitances were neutralized with cross-coupled capacitors allowed us to vary the gain by around 21 dB in the operating frequency band. The noise figure was estimated to be better than 5.9 dB in the operating frequency band from the full electromagnetic (EM) simulation.

A Wideband Reconfigurable CMOS VGA Based on an Asymmetric Capacitor Technique with a Low Phase Variation

“…Moreover, a VGA with low additional phase shift during gain tuning is also very important, which can greatly simplify the complexity of phased array calibration procedures [9]. To this end, various phase-invariant VGAs have been proposed [11][12][13][14][15], such as the study by [12], which achieves a 7.5 dB gain tuning range with <3.5 • root-mean-square (RMS) procedures [9]. To this end, various phase-invariant VGAs have been proposed [11][12][13][14][15], such as the study by [12], which achieves a 7.5 dB gain tuning range with <3.5° root-meansquare (RMS) phase error across 27-42 GHz by introducing interstage inductance.…”

“…To this end, various phase-invariant VGAs have been proposed [11][12][13][14][15], such as the study by [12], which achieves a 7.5 dB gain tuning range with <3.5 • root-mean-square (RMS) procedures [9]. To this end, various phase-invariant VGAs have been proposed [11][12][13][14][15], such as the study by [12], which achieves a 7.5 dB gain tuning range with <3.5° root-meansquare (RMS) phase error across 27-42 GHz by introducing interstage inductance. However, the designs mentioned above all adopt multiple-stack transistor structures, which suffer from more complex circuit topologies and higher supply voltage values, compared with stackless topologies under the same technology node and the normal supply voltage recommended by the vendor.…”

Neural-Network-Based Automated Synthesis of Transformer Matching Circuits for RF Amplifier Design

“…P LANAR transformers (TFs) based on multilevel backend thick metallization technologies have been commonly used as impedance matching circuits (MCs) in contemporary millimeter-wave (mm-wave) CMOS circuits for a compact layout and broadband operation [1], [2], [3], [4], [5], [6], [7], [8]. However, the common equivalent models of The authors are with the Department of Electrical Engineering, Pohang University of Science and Technology, Pohang 37673, South Korea (e-mail: daniellee97@postech.ac.kr; taehyun@postech.ac.kr; hojin.song@ postech.ac.kr).…”