In stretchable electronics, high-resolution stretchable interfacing at a mild temperature is considered as a great challenge and has not been achieved yet. This study presents a stretchable anisotropic conductive film (S-ACF) that can electrically connect high-resolution stretchable circuit lines to other electrodes whether they are rigid, flexible, or stretchable. The key concepts of this study are (i) high-resolution (~50 μm) but low–contact resistance (0.2 ohm in 0.25 mm2) interfacing by periodically embedding conductive microparticles in thermoplastic film, (ii) low-temperature interfacing through the formation of chemical bonds between the S-ACF and the substrates, (iii) economical interfacing by selectively patterning the S-ACF, and (iv) direct interfacing of chips by using the adhesion of the thermoplastic matrix. We integrate light-emitting diodes on the patterned S-ACF and demonstrate stable light operation at large biaxial areal stretching (εxy = 70%).

We have studied the properties of Ag/undoped ZnO (ZnO) multilayer thin films deposited on glass substrates by facing target sputtering. In an attempt to determine the optimum conditions of the Ag thin film, which would be coated on the ZnO thin film, we investigated the changes in sheet resistance, transmittance, and surface morphology as functions of varying deposition time and substrate temperature. The electrical and optical characteristics of Ag/ZnO multilayers were evaluated using a four-point probe, and a UV/visible (vis) spectrometer with a spectral range of 390 -770 nm, an X-ray diffractometer (XRD), atomic force microscopy (AFM), and a field emission scanning electron microscopy (SEM). We prepared the Ag/ZnO multilayer thin film with a sheet resistance of 7.53 /sq. and a transmittance of more than 80% at 550 nm.

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This paper presents a variable-gain amplifier (VGA) in the 68–78 GHz range. To reduce DC power consumption, the drain voltage was set to 0.5 V with competitive performance in the gain and the noise figure. High-Q shunt capacitors were employed at the gate terminal of the core transistors to move input matching points for easy matching with a compact transformer. The four stages amplifier fabricated in 40-nm bulk complementary metal oxide semiconductor (CMOS) showed a peak gain of 24.5 dB at 71.3 GHz and 3‑dB bandwidth of more than 10 GHz in 68–78 GHz range with approximately 4.8-mW power consumption per stage. Gate-bias control of the second stage in which feedback capacitances were neutralized with cross-coupled capacitors allowed us to vary the gain by around 21 dB in the operating frequency band. The noise figure was estimated to be better than 5.9 dB in the operating frequency band from the full electromagnetic (EM) simulation.