An economic analysis and ROI model for nanometer test

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

et al. 2009

Abstract-Linear feedback shift register (LFSR) reseeding forms the basis for many test-compression solutions. A seed can be computed for each test cube by solving a system of linear equations based on the feedback polynomial of the LFSR. Despite the availability of numerous LFSR-reseeding-based compression methods in the literature, relatively little is known about the effectiveness of these seeds for unmodeled defects, particularly since there are often several candidate seeds for a test cube. We use the recently proposed output deviation measure of the resulting patterns as a metric to select appropriate LFSR seeds. Experimental results are reported using test patterns for stuck-at and transition faults derived from selected seeds for the ISCAS-89 and the IWLS-05 benchmark circuits. These patterns achieve higher coverage for transition and stuck-open faults than patterns obtained using other seed-generation methods for LFSR reseeding. Given a pattern pair (p 1 , p 2 ) for transition faults, we also examine the transition-fault coverage for launch on capture by using p 1 and p 2 to separately compute output deviations. Results show that p 1 tends to be better when there is a high proportion of do-not-care bits in the test cubes, while p 2 is a more appropriate choice when the transition-fault coverage is high.

“…4(a). Given a set of test cubes T , we generate N s seeds for each test cube (lines [2][3][4][5][6]. N s is a user-defined parameter that restricts the search space of seeds.…”

Section: Seed Selectionmentioning

confidence: 99%

mentioning

confidence: 99%

Deviation-Based LFSR Reseeding for Test-Data Compression

Wang¹,

Fang

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

et al. 2009

“…For example, the test data volume for transition-delay faults is 2-5 times higher than that for stuck-at faults [20]. The 2005 ITRS document predicted that the test data volume and test application time for integrated circuits will be as much as thirty times larger in 2010 than they were in 2005 [1].…”

Section: Motivation and Prior Workmentioning

confidence: 99%

Interconnect-Aware and Layout-Oriented Test-Pattern Selection for Small-Delay Defects

Yilmaz

2008 IEEE International Test Conference

Tehranipoor

2008

“…As a result, the test data volumes for today's integrated circuits are prohibitively high. For example, the test data volume for transition-delay faults is 2-5 times higher than that for stuckat faults [2], and test patterns for such sequence-and timingdependent faults are more important for newer technologies [3]. Moreover, due to shrinking process technologies, the physical limits of photolithographic processing, and new materials such as copper interconnects, many new types of manufacturing defects cannot be accurately modeled using known fault models [4].…”

Section: Introductionmentioning

confidence: 99%

A Seed-Selection Method to Increase Defect Coverage for LFSR-Reseeding-Based Test Compression

Wang

12th IEEE European Test Symposium (ETS'07)

Bienek

2007

Abstract-LFSR reseeding forms the basis for many test compression solutions. A seed can be computed for each test cube by solving a system of linear equations based on the feedback polynomial of the LFSR. Despite the availability of numerous LFSR-reseeding-based compression methods in the literature, relatively little is known about the effectiveness of these seeds for unmodeled defects. We use the recently proposed output deviation measure of the resulting patterns as a metric to select appropriate LFSR seeds. Experimental results are reported using test patterns for stuck-at faults derived from selected seeds. These patterns achieve higher coverage for stuck-open and transition faults than patterns obtained using other methods.