An Educational Digital Communications Project Using FPGAs to Implement a BPSK Detector

Ahamed, Faruque; Scarpino, Frank A.

doi:10.1109/te.2004.837036

Cited by 29 publications

(9 citation statements)

References 5 publications

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“…Comparing the design summary obtained with other works in this field [1] - [8], the logic utilization of the board was lower in terms of the slice flip-flops and LUTs used. All of these make the design suitable in terms of propagation, implementation and logic utilization of the Spartan 3E boards used in this work.…”

Section: Discussionmentioning

confidence: 72%

“…The modulating signal is generated internal, in the modulator, by a LFSR. The carrier is also generated internal, and is made of 16 different values kept in a ROM memory [1]. The yielded carrier with 180º phase shift is obtained by reading the ROM memory later with 8 samples.…”

Section: B Bpsk System In System Generatormentioning

confidence: 99%

“…The main difference is the System Generator block which makes possible the administration of the Xilinx components. Important studies were made in this field and were cited in this paper [1], [2], [3], [4], [5], [6], [7].…”

Section: Introductionmentioning

confidence: 99%

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BPSK system on Spartan 3E FPGA

Popescu

Gontean

Budura

2012

2012 IEEE 10th International Symposium on Applied Machine Intelligence and Informatics (SAMI)

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The paper presents a theoretical background overview of the digital communication systems and the BPSK modulation and demodulation. The purposed design is the BPSK system. The BPSK modulation and demodulation represents an important modulation technique in terms of signal power. The BPSK system is simulated using Matlab/ Simulink environment and System Generator, a tool from Xilinx used for FPGA design as well as implemented on two Spartan 3E Starter Kit boards. The first board behaves as a modulator and the second as a demodulator. The modulator and demodulator algorithms have been implemented on FPGA using the VHDL language on Xilinx ISE 12.3. The local clock oscillator of the board is 50Mhz which corresponds with a period of 20ns. The frequency of the BPSK carrier is 31,250 kHz. Both, the modulator and demodulator, have been designed and simulated and theirs performances were evaluated by measurements.

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Section: Discussionmentioning

confidence: 72%

Section: B Bpsk System In System Generatormentioning

confidence: 99%

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BPSK system on Spartan 3E FPGA

Popescu

Gontean

Budura

2012

2012 IEEE 10th International Symposium on Applied Machine Intelligence and Informatics (SAMI)

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“…We obtain samples of sine and cosine waves , these sample amplitudes are the coefficients that are to be stored in ROM i.e. a readable only notepad file [8][9][10].Address generator circulates these specific coefficients for every cycle. Address generator is a 5 bit counter which generates and cycles 32 coefficients continuously.…”

Section: Proposed Methodologymentioning

confidence: 99%

Design and synthesis of bandwidth efficient QPSK modulator for low power VLSI design

Khanna¹,

Jaiswal²,

Jain³

2015

2015 2nd International Conference on Electronics and Communication Systems (ICECS)

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In recent years digital designs have been highly automated, and the digital modulation provides more information capacity, compatibility, higher data security, better quality communications and quicker system availability with digital services. This paper proposes a QPSK module based on bandwidth efficiency of the QPSK modulator has been implemented with the proposed technique; and thereby compared with the conventional BPSK modulation scheme. Synthesis and implementation of QPSK modulation technique is described viz. subsystem modules of digital communication. The QPSK modulator unit will be modelled using HDL code and simulation is done using Modelsim 10.d simulator followed by synthesis and FPGA implementation of the design using Xilinx ISE design suite using Spartan-6 FPGA kit. IndexTerms-Binary-phase-shift keying (BPSK), Quadraturephase-shift-keying (QPSK)Field programmable gate array (FPGA), Verilog HDL, MATLAB, Modelsim, Xilinx.

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“…Yapılan bir çalışmada önerilen mimari deneysel çalışmalar için önerilmiştir. Gerçekleştirilen mimari sadece benzetim sonuçlarına yer vererek pratik uygulanabilirliği tartışılmamıştır [9]. Gerçek zamanlı bir BPSK modülatör mimarisi de [10]'da önerilmiştir.…”

Section: Introductionunclassified

Design of a new BPSK modulator

Sönmez¹,

Akbal²

2017

Pamukkale J Eng Sci

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An Educational Digital Communications Project Using FPGAs to Implement a BPSK Detector

Cited by 29 publications

References 5 publications

BPSK system on Spartan 3E FPGA

BPSK system on Spartan 3E FPGA

Design and synthesis of bandwidth efficient QPSK modulator for low power VLSI design

Design of a new BPSK modulator

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