An embryonic approach to reliable digital instrumentation based on evolvable hardware

Sahni, Vishal; Pyara, V. P.

doi:10.1109/tim.2003.818737

Cited by 9 publications

(4 citation statements)

References 6 publications

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“…The embryonic design approach is considered to design the fault-tolerant electronics system [7] [8]. Embryonic, a homogeneous array of embryonic cells, possesses self-healing due to its structure.…”

Section: Embryonic Architecture With Cgp Configuration Datamentioning

confidence: 99%

Embryonic Architecture with Built-in Self-test and GA Evolved Configuration Data

Malhotra,

Duraiswamy,

Kishore

2022

International Journal of Electronics and Telecommunications

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The embryonic architecture, which draws inspiration from the biological process of ontogeny, has built-in mechanisms for self-repair. The entire genome is stored in the embryonic cells, allowing the data to be replicated in healthy cells in the event of a single cell failure in the embryonic fabric. A specially designed genetic algorithm (GA) is used to evolve the configuration information for embryonic cells. Any failed embryonic cell must be indicated via the proposed Built-in Selftest (BIST) the module of the embryonic fabric. This paper recommends an effective centralized BIST design for a novel embryonic fabric. Every embryonic cell is scanned by the proposed BIST in case the self-test mode is activated. The centralized BIST design uses less hardware than if it were integrated into each embryonic cell. To reduce the size of the data, the genome or configuration data of each embryonic cell is decoded using Cartesian Genetic Programming (CGP). The GA is tested for the 1-bit adder and 2-bit comparator circuits that are implemented in the embryonic cell. Fault detection is possible at every function of the cell due to the BIST module's design. The CGP format can also offer gate-level fault detection. Customized GA and BIST are combined with the novel embryonic architecture. In the embryonic cell, self-repair is accomplished via data scrubbing for transient errors.

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Section: Embryonic Architecture With Cgp Configuration Datamentioning

confidence: 99%

Embryonic Architecture with Built-in Self-test and GA Evolved Configuration Data

Malhotra,

Duraiswamy,

Kishore

2022

International Journal of Electronics and Telecommunications

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“…Both [10], [11] use a DNA which place the functionality for the cells leaving no room for autonomy for the cells and both use a low logical granularity. Others have tried to combine EHW and embryonics [12]. They used the self-reconfigurability of the EHW to repair the fault if possible.…”

Section: A Related Workmentioning

confidence: 99%

eDNA: A Bio-Inspired Reconfigurable Hardware Cell Architecture Supporting Self-organisation and Self-healing

Boesen

Madsen

2009

2009 NASA/ESA Conference on Adaptive Hardware and Systems

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Abstract-This paper presents the concept of a biological inspired reconfigurable hardware cell architecture which supports self-organisation and self-healing. Two fundamental processes in biology, namely fertilization-to-birth and cell selfhealing have inspired the development of this cell architecture. In biology as well as in our hardware cell architecture it is the DNA which enables these processes. We propose a platform based on the electronic DNA (eDNA) and show through simulation, its capabilities as a new generation of robust reconfigurable hardware platforms. We have created a Java based simulator to simulate our self-organisation and self-healing algorithms and the results obtained from this looks promising.

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“…Mange, et al [7] proposed an embryonic method to design self-repair and self replication systems. Sahni and Pyara [8] proposed a novel backpropagation algorithm for hardware reconfiguration. It use the dynamic restructuring capabilities to detect faults and repair or adapt to the error in real-time.…”

Section: Introductionmentioning

confidence: 99%

Negatively-correlated redundancy circuits evolution: A novel way of robust analog circuit synthesizing

Liu

Jiang

2010

Third International Workshop on Advanced Computational Intelligence

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Integrated circuit technology has been dramatically developed during the past decades. Reliability of analog circuits becomes more and more important for yield design. However, most state of the art researches are concentrated on analog circuit robust optimization and analog circuit fault detection. There are seldom any researches on analog circuit fault-tolerant design. This paper proposed an negativelycorrelated evolution strategy to design fault-tolerant analog circuits. In the proposed strategy, the fault-tolerant circuit can be considered as an ensemble system. The system contains several child circuits. negatively-correlated evolution strategy automatically synthesizes these child circuits, and make sure the errors of each child circuits are negatively correlated to each other. The experimental result shows that, in most circumstances, the circuit with negative correlation redundancy has the best fault tolerant performance compared with the circuit with randomly generated redundancy. The the circuit with duplicated redundancy didn't has much improvement compared with single circuit. So, the proposed strategy is a beneficial idea towards robust and fault tolerant analog circuit design.

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An embryonic approach to reliable digital instrumentation based on evolvable hardware

Cited by 9 publications

References 6 publications

Embryonic Architecture with Built-in Self-test and GA Evolved Configuration Data

Embryonic Architecture with Built-in Self-test and GA Evolved Configuration Data

eDNA: A Bio-Inspired Reconfigurable Hardware Cell Architecture Supporting Self-organisation and Self-healing

Negatively-correlated redundancy circuits evolution: A novel way of robust analog circuit synthesizing

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