An empirical nonlinear RF model for CMOS fet suitable for modeling the breakdown region

Abstract

This paper deals with modeling of drain current IDS(VGS,VDS) and intrinsic nonlinear capacitances Cgs(VGS,VDS) and Cgd(VGS,VDS) of the CMOS FET by means of empirical analytical expressions. The proposed models are based on exponential series allowing modeling of the CMOS FET from the linear to the breakdown region. Several High Voltage CMOS (HVMOS) FETs were used to validate the proposed models under pulsed DC, small and large signals. The high correlation between simulated and measured data supports the capability of the proposed empirical model to predict the electrical behavior of the CMOS FET. © 2017 Wiley Periodicals, Inc. Microwave Opt Technol Lett 59:563–567, 2017