An Energy-Efficient Reconfigurable Circuit-Switched Network-on-Chip

Abstract

Network-on-Chip (NoC) is an energy-efficient on-chip communication architecture for multi-tile System-on-Chip (SoC) architectures. The SoC architecture, including its run-time software, can replace inflexible ASICs for future ambient systems. These ambient systems have to be flexible as well as energy-efficient. To find an energy-efficient solution for the communication network we analyze three wireless applications. Based on their communication requirements we observe that revisiting of the circuit switching techniques is beneficial. In this paper we propose a new energy-efficient reconfigurable circuit-switched Network-on-Chip. By physically separating the concurrent data streams we reduce the overall energy consumption. The circuit-switched router has been synthesized and analyzed for its power consumption in 0.13 µm technology. A 5-port circuit-switched router has an area of 0.05 mm 2 and runs at 1075 MHz. The proposed architecture consumes 3.5 times less energy compared to its packet-switched equivalent.

A Survey on Reconfigurable System-on-Chips

“…The router is dynamically reconfigurable to exchange between switching schemes at run-time, therefore, it achieves higher average performance than wormhole switching, while reducing the implementation cost in comparison with the virtual cutthrough switching. Wolkotte et al in [56] proposed a circuit-switched router with the physical link that is partitioned into multi-lanes. The purpose of lanes is similar to that of virtual channels in packet-switched router.…”

A quantitative evaluation of a Network on Chip design flow for multi-core consumer multimedia applications

“…Thus, dedicated interconnects [49,80] that rely on global synchronicity impair the overall physical scalability and must be avoided. By reusing one and the same interconnect for both user data and control, as proposed in [28,60], the problem is reduced to providing one scalable interconnect.…”

On-chip data communication : analysis, optimization and circuit design

“…However, in certain router schemes, one can also omit the re-alignment at intermediate routers and directly forward the data to the next link, thereby greatly reducing the latency of the hops. Direct forwarding -also known as wave-pipelining -can for example be useful in a circuit-switched network [183] where the crossbars that connect the links are pre-configured and there is no need to re-align the data to the local router-clock at each hop, but only at the destination. Source-synchronous transceivers with directforwarding can also be interesting for more fine-grained systems that use static routing, such as FPGA's.…”