An Event-Driven Quasi-Level-Crossing Delta Modulator Based on Residue Quantization

Abstract

This article introduces a digitally intensive eventdriven quasi-level-crossing (quasi-LC) delta-modulator analogto-digital converter (ADC) with adaptive resolution (AR) for Internet of Things (IoT) wireless networks, in which minimizing the average sampling rate for sparse input signals can significantly reduce the power consumed in data transmission, processing, and storage. The proposed AR quasi-LC delta modulator quantizes the residue voltage signal with a 4-bit asynchronous successive-approximation-register (SAR) sub-ADC, which enables a straightforward implementation of LC and AR algorithms in the digital domain. The proposed modulator achieves data compression by means of a globally signal-dependent average sampling rate and achieves AR through a digital multi-level comparison window that overcomes the tradeoff between the dynamic range and the input bandwidth in the conventional LC ADCs. Engaging the AR algorithm reduces the average sampling rate by a factor of 3 at the edge of the modulator's signal bandwidth. The proposed modulator is fabricated in 28-nm CMOS and achieves a peak SNDR of 53 dB over a signal bandwidth of 1.42 MHz while consuming 205 µW and an active area of 0.0126 mm 2. Index Terms-Adaptive resolution (AR), analog-to-digital converter (ADC), asynchronous successive-approximation-register (SAR) ADC, compressed sensing, event-based signal processing, Internet of Things (IoT), level crossing (LC).

An Adaptive-Resolution Quasi-Level-Crossing Delta Modulator With VCO-Based Residue Quantizer

“…We define α = LSB DAC /LSB sub−ADC , where LSB DAC and LSB sub−ADC are respectively the LSBs of the sw-cap DAC and the residue quantizer sub-ADC. The z-domain transfer functions to the system output D OUT from the input noise of VCO residue quantizer E V (NTF V ) and from the input signal V IN (STF) were shown in [10]. The z-domain transfer function to the system output D OUT from the phase quantization noise E Q of the VCO-based residue quantizer (NTF Q ) can be derived in a similar way as in [10]:…”

“…Moreover, the output of this quasievel-crossing ADC can directly interface to the discrete-time (DT) DSPs. Nonetheless, LC and quasi-level-crossing ADCs generally have limited dynamic range (DR) as signals with small amplitude variations do not cross any threshold levels and remain undetected [10]. Furthermore, sampling of slowly varying components of the input signal might not satisfy the Nyquist criterion.…”

“…In this brief, we replace the SAR-based residue quantizer in [7], [10] with a VCO-based residue quantizer, as depicted in Fig. 1b.…”

“…We demonstrate that performance requirements for this VCO-based quantizer (generally considered as the main nonlinearity contributor in a standalone VCO-based ADC) can be significantly relaxed, since its distortion and mismatch are well tolerated within the delta-modulator-based quasilevel-crossing ADC loop. Indeed, the inherent and mismatchinduced dithering in the VCO-based residue quantizer, whose effects can be filtered out, not only mitigates the leakage effects of the switched-capacitor (sw-cap) subtractor on the system performance [10], but also increases the DR of the system and its average sampling rate for low-amplitude and slowly varying input signals. Section II introduces the proposed topology, and presents system-level analysis.…”

The Complex Adaptive Delta-Modulator in Sliding Mode Theory

“…Over the last few years, the quantizers and modulators have gain popularity due to their important role in many engineering fields including measurement, instrumentation, power converters and analog to digital conversion (ADC) [ 1 , 2 ]. In particular, the binary quantizers including delta modulators ( -Ms) and delta sigma modulators ( -Ms) are widely utilized in power conversions for their implementation simplicity [ 3 , 4 ], networked and quantized control systems for their low-data rate [ 5 , 6 ], and as typical complex systems for their high nonlinearity, periodicity and robustness at the same time [ 7 , 8 ].…”