An Experimental Analysis of Power and Delay Signal-to-Noise Requirements for Detecting Trojans and Methods for Achieving the Required Detection Sensitivities

Lamech, Charles; Rad, Reza M.; Tehranipoor, Mohammad; Plusquellic, Jim

doi:10.1109/tifs.2011.2136339

Cited by 49 publications

(17 citation statements)

References 13 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Large TSV pitch can lead to area inefficiencies [50] [84] are estimated, and Trojans are identified. GLC shares the limitations of other fingerprinting techniques (e.g., [89] VIII. CONCLUSIONS TPAD protects digital systems from hardware Trojan attacks through a combination of special concurrent error detection techniques and selective programmability.…”

Section: B Tpad Vs Other Techniquesmentioning

confidence: 99%

TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits

Ganesan

et al. 2016

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

View full text Add to dashboard Cite

Abstract-There are increasing concerns about possible malicious modifications of integrated circuits (ICs) used in critical applications. Such attacks are often referred to as hardware Trojans. While many techniques focus on hardware Trojan detection during IC testing, it is still possible for attacks to go undetected. Using a combination of new design techniques and new memory technologies, we present a new approach that detects a wide variety of hardware Trojans during IC testing and also during system operation in the field. Our approach can also prevent a wide variety of attacks during synthesis, place-and-route, and fabrication of ICs. It can be applied to any digital system, and can be tuned for both traditional and split-manufacturing methods. We demonstrate its applicability for both ASICs and FPGAs. Using fabricated test chips with Trojan emulation capabilities and also using simulations, we demonstrate: 1. The area and power costs of our approach can range between 7.4-165% and 0.07-60%, respectively, depending on the design and the attacks targeted; 2. The speed impact can be minimal (close to 0%); 3. Our approach can detect 99.998% of Trojans (emulated using test chips) that do not require detailed knowledge of the design being attacked; 4. Our approach can prevent 99.98% of specific attacks (simulated) that utilize detailed knowledge of the design being attacked (e.g., through reverse-engineering). 5. Our approach never produces any false positives, i.e., it does not report attacks when the IC operates correctly. I. INTRODUCTION HERE is growing concern about the trustworthiness of integrated circuits (ICs). If an untrusted party fabricates an IC, there is potential for an adversary to insert a malicious hardware Trojan [1], an unauthorized modification of the IC resulting in incorrect functionality and/or sensitive data being exposed [2]. These include (but are not limited to) [3]: a) Modification of functional behavior through logic changes: Index TermsFor example, extra logic gates may be inserted to force an incorrect logic value on a wire at some (arbitrary) point in time (Fig. 1a) [2]. b) Electrical modification: For example, extra capacitive loading may be placed on a circuit path to alter timing characteristics of the IC (Fig. 1b) [2]. c) Reliability degradation: For example, aging of transistors (e.g., Negative Bias Temperature Instability (NBTI)) may be accelerated, degrading reliability ( Fig. 1c) [4]. A hardware Trojan is detected when we report malicious modifications to an IC. A hardware Trojan is prevented when Manuscript received January 9, 2015; revised May 8, 2015; accepted July 20, 2015. Work supported by IARPA Trusted Integrated Chips (TIC) Program. All authors are with Dept. of Electrical Engineering, Stanford University, Stanford, CA 94305 USA (e-mail: tonyfwu@stanford.edu). S. Mitra is also with Dept. of Computer Science, Stanford University.we stop a hardware Trojan from being inserted. Part of the challenge in detecting or preventing hardware Trojans arises from the fact that...

show abstract

Section: B Tpad Vs Other Techniquesmentioning

confidence: 99%

TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits

Ganesan

et al. 2016

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

View full text Add to dashboard Cite

show abstract

“…Additional methods reduce the overall test effort, e. g. via statistical analysis or state space obfuscation [11], [12]. It is also possible to compare physical parameters of a chip to a Trojan-free reference chip -the golden model -allowing the detection of side channels [13]- [15]. Invasion refers to the insertion of additional circuits into a design without changing its original functionality in order to test it after production [13], [16].…”

Section: Related Workmentioning

confidence: 99%

“…It is also possible to compare physical parameters of a chip to a Trojan-free reference chip -the golden model -allowing the detection of side channels [13]- [15]. Invasion refers to the insertion of additional circuits into a design without changing its original functionality in order to test it after production [13], [16]. In combination with Trojan detection, their localization is also of interest.…”

Section: Related Workmentioning

confidence: 99%

Towards a Hardware Trojan Detection Cycle

Dabrowski

Hobel

Ullrich

et al. 2014

2014 Ninth International Conference on Availability, Reliability and Security

View full text Add to dashboard Cite

Intentionally inserted malfunctions in integrated circuits, referred to as Hardware Trojans, have become an emerging threat. Recently, the scientific community started to propose technical approaches to mitigate the threat of unspecified and potentially malicious functionality. However, these detection and prevention mechanisms are still hardly integrated in the industry's Hardware development life cycles. We therefore propose in this work a secure hardware development life cycle that assembles methods from trustworthy software engineering.In addition to full traceability from specification to implementation, and down to each gate, we introduce a feedback detection cycle that systematically escorts every single step of the development process. To do so, we integrate different detection methods for each development phase that are derived from a common knowledge base.

show abstract

“…Existence of a malicious IP core invalidates the applicability of many of the previously proposed methods for Hardware Trojan detection [1,6,19,23,31,32]. Most of the existing methods rely on golden models to generate the fingerprints and compare them with those measured from circuit-under-test using certain data analysis methods.…”

Section: Introductionmentioning

confidence: 99%

Pre-silicon security verification and validation

Guo

Dutta

Jin

et al. 2015

Proceedings of the 52nd Annual Design Automation Conference

View full text Add to dashboard Cite

Reusable hardware Intellectual Property (IP) based Systemon-Chip (SoC) design has emerged as a pervasive design practice in the industry today. The possibility of hardware Trojans and/or design backdoors hiding in the IP cores has raised security concerns. As existing functional testing methods fall short in detecting unspecified (often malicious) logic, formal methods have emerged as an alternative for validation of trustworthiness of IP cores. Toward this direction, we discuss two main categories of formal methods used in hardware trust evaluation: theorem proving and equivalence checking. Specifically, proof-carrying hardware (PCH) and its applications are introduced in detail, in which we demonstrate the use of theorem proving methods for providing high-level protection of IP cores. We also outline the use of symbolic algebra in equivalence checking, to ensure that the hardware implementation is equivalent to its design specification, thus leaving little space for malicious logic insertion.

show abstract

An Experimental Analysis of Power and Delay Signal-to-Noise Requirements for Detecting Trojans and Methods for Achieving the Required Detection Sensitivities

Cited by 49 publications

References 13 publications

TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits

TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits

Towards a Hardware Trojan Detection Cycle

Pre-silicon security verification and validation

Contact Info

Product

Resources

About