2018 13th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC) 2018
DOI: 10.1109/recosoc.2018.8449373
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An FPGA target for the StarPU heterogeneous runtime system

Abstract: Abstract-Heterogeneity in HPC nodes appears as a promising solution to improve the execution of a wide range of scientific applications, regarding both performance and energy consumption. Unlike CPUs and GPUs, FPGAs can be configured to fit the application needs, making them an appealing target to extend traditional heterogeneous HPC architectures. However, exploiting them requires an in-depth knowledge of low-level hardware and high expertise on vendor-provided tools, which should not be the primary concern o… Show more

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Cited by 2 publications
(2 citation statements)
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“…One of the closest environments to CEDR from the HPC domain is likely StarPU [4]. StarPU is a well known platform for enabling heterogeneous task scheduling and execution on HPC-scale systems, and it has even been extended to enable features like FPGA support [11]. However, to the best of our knowledge, it has not been applied to SoC-scale systems, and as such the workloads it excels at executing have characteristics that are quite different from those seen in frameworks like CEDR.…”
Section: Related Workmentioning
confidence: 99%
See 1 more Smart Citation
“…One of the closest environments to CEDR from the HPC domain is likely StarPU [4]. StarPU is a well known platform for enabling heterogeneous task scheduling and execution on HPC-scale systems, and it has even been extended to enable features like FPGA support [11]. However, to the best of our knowledge, it has not been applied to SoC-scale systems, and as such the workloads it excels at executing have characteristics that are quite different from those seen in frameworks like CEDR.…”
Section: Related Workmentioning
confidence: 99%
“…Using the CEDR compilation environment, application developers can develop 111:3 and validate large, non-trivial applications to serve as workloads for scheduling heuristic developers and hardware architects; scheduling heuristic developers can easily implement their policies in a common environment for cross-validation and evaluation; and hardware architects can design new DSSoC architectures with the knowledge that they will be able to build on an existing library of validated applications and schedulers rather than rely on simple micro-benchmarks executed in unrealistic simulation environments. While there are a large number of existing works that provide software and runtime environments for heterogeneous architectures [3,7,8,11,21,35,46], CEDR is unique in the way it brings together all of these aspects of DSSoC development and couples them with unique features like task-level measurement of performance counters or support for software-based pipelining ("streaming") of application tasks. We believe that the CEDR ecosystem, with its integrated compile-time and runtime workflows, will empower researchers to conduct design space explorations, and consequently, it will help the research community move towards answering the aforementioned questions and establishing a more general understanding of DSSoCs and their broader role in an era of increasingly heterogeneous computing systems.…”
Section: Introductionmentioning
confidence: 99%