An HEVC fractional interpolation hardware using memory based constant multiplication

Abstract

Abstract-Fractional interpolation is one of the most computationally intensive parts of High Efficiency Video Coding (HEVC) video encoder and decoder. In this paper, an HEVC fractional interpolation hardware using memory based constant multiplication is proposed. The proposed hardware uses memory based constant multiplication technique for implementing multiplication with constant coefficients. The proposed memory based constant multiplication hardware stores pre-computed products of an input pixel with multiple constant coefficients in memory. Several optimizations are proposed to reduce memory size. The proposed HEVC fractional interpolation hardware, in the worst case, can process 35 quad full HD (3840x2160) video frames per second. It has up to 31% less energy consumption than original HEVC fractional interpolation hardware.

A Reconfigurable Fractional Interpolation Hardware for VVC Motion Compensation

“…Then, interpolated video frames are displayed on HDMI monitor. Since the proposed hardware is the first VVC fractional interpolation hardware for motion compensation in the literature, it is compared with HEVC fractional interpolation hardware in the literature [11]- [16]. The comparison is shown in Table IV.…”

“…The proposed hardware is the first VVC fractional interpolation hardware for motion compensation in the literature. Several HEVC fractional interpolation hardware implementations are proposed in the literature [11]- [16]. In Section III, the VVC fractional interpolation hardware proposed in this paper is compared with them.…”