An implementation of low latency address-mapping logic for SSD controllers

Song, Y.K.; So, Hyunjoo; Chun, Yongjae; Yuan, Hong

doi:10.1587/elex.16.20190521

Cited by 1 publication

(1 citation statement)

References 27 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Normal address mapping algorithms followed previous studies [20,21]. However, we proceeded with address mapping through a published method [22] from our previous work in which we introduced a hardware-based address mapping table.…”

Section: Block-level Blockingmentioning

confidence: 99%

Efficient Garbage Collection Algorithm for Low Latency SSD

Yuan

2022

Electronics

Self Cite

View full text Add to dashboard Cite

Solid-state drives (SSDs) are rapidly replacing hard disk drives (HDDs) in many applications owing to their numerous advantages such as higher speed, low power consumption, and small size. NAND flash memories, the memory devices used for SSDs, require garbage collection (GC) operations to reclaim wasted storage space due to obsolete data. The GC is the major source of performance degradation because it greatly increases the latency for SSDs. The latency for read or write operations is sometimes significantly long if the operations are requested by users while GC operations are in progress. Reducing the frequency of GC invocation while maintaining the storage space requirement may be an ideal solution to remedy this problem, but there is a minimal number of GC operations to reserve storage space. The other approach is to reduce the performance overhead due to GC rather than reducing GC frequency. In this paper, following the latter approach, we propose a new GC scheme that reduces GC overhead by intelligently controlling the priorities among read/write and GC operations. The experimental results show the proposed scheme consistently improve the overall latency for various workloads.

show abstract

Section: Block-level Blockingmentioning

confidence: 99%