Proceedings Sixth International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000) (Cat. No. PR00 2000
DOI: 10.1109/async.2000.837010
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An instruction buffer for a low-power DSP

Abstract: An architecture for a low-power asynchronous DSP has been developed, for the target application of GSM (digital cellphone)

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