2016 IEEE 25th Asian Test Symposium (ATS) 2016
DOI: 10.1109/ats.2016.23
|View full text |Cite
|
Sign up to set email alerts
|

An IR-Drop Aware Test Pattern Generator for Scan-Based At-Speed Testing

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1

Citation Types

0
0
0

Year Published

2018
2018
2023
2023

Publication Types

Select...
2
1

Relationship

0
3

Authors

Journals

citations
Cited by 3 publications
(2 citation statements)
references
References 13 publications
0
0
0
Order By: Relevance
“…The bit-flipping process is repeated till patterns are generated for all faults. Hou et al [24] proposed another technique that improves the serial bit-flipping computation. It performs structural analysis and divides inputs into strongly related groups based on the fanout, as shown in Figure 6.…”
Section: Pattern Optimization Techniques 51 X-fillingmentioning
confidence: 99%
See 1 more Smart Citation
“…The bit-flipping process is repeated till patterns are generated for all faults. Hou et al [24] proposed another technique that improves the serial bit-flipping computation. It performs structural analysis and divides inputs into strongly related groups based on the fanout, as shown in Figure 6.…”
Section: Pattern Optimization Techniques 51 X-fillingmentioning
confidence: 99%
“…Figure 6. Related inputs groups-highly related (xi/xj), less related (xj/xk), and non-related (xi/xk)[24] …”
mentioning
confidence: 99%