An OpenCL-Based Hybrid CNN-RNN Inference Accelerator On FPGA

Sun, Yueheng; Liu, Brian; Xu, Xianchao

doi:10.1109/icfpt47387.2019.00048

Cited by 9 publications

(3 citation statements)

References 12 publications

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“…Many energy-efficient hardware accelerators have been proposed to reduce power consumption and improve the speed of DCNN computing in recent years. These accelera-tors based on application-specific integrated circuits (ASIC) [7,8,9,10,11,12,13,14,15,16,17,18,19] and fieldprogrammable gate array (FPGA) [20,21,22,23,24,25,26] have achieved low latency and high efficiency on CNN computing. Two classic CNN of AlexNet and VGG have been demonstrated the excellent performance earlier, including UNPU [7], DSIP [12], Eyeriss [13], and DNPU [18].…”

Section: Introductionmentioning

confidence: 99%

CASSANN-v2: A high-performance CNN accelerator architecture with on-chip memory self-adaptive tuning

Liu

Qiao

Chen

et al. 2022

IEICE Electron. Express

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This work proposes a high-performance reconfigurable CNN accelerator architecture, called CASSANN-v2, which can achieve 1TOPS peak performance at 1 GHz. CASSANN-v2 provides the function of onchip SRAM memory real-time adaptive tuning by parameter configuration to reduce the intermediate output data transmission to further exploit the acceleration performance. The system simulation results show that CASSANN-v2 exhibits excellent performance on VGG-16 and ResNet-18 inference, with a throughput of 1009.54GOPS and 923.24GOPS at 1 GHz, which achieved 98.59% and 90.20% average processing element utilization, respectively. Compared with state-of-the-art accelerator works, CASSANN-v2 improves the resource utilization by 2.02× in

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Section: Introductionmentioning

confidence: 99%

CASSANN-v2: A high-performance CNN accelerator architecture with on-chip memory self-adaptive tuning

Liu

Qiao

Chen

et al. 2022

IEICE Electron. Express

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“…Therefore, there will be a large amount of data duplication leading to bandwidth waste because of the transformation. Work [8,9] used the same hardware resource to implement different calculation modes in hybrid algorithms.…”

Section: Introductionmentioning

confidence: 99%

Hybrid CNN-SVM Inference Accelerator on FPGA Using HLS

et al. 2022

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Convolution neural networks (CNN), support vector machine (SVM) and hybrid CNN-SVM algorithms are widely applied in many fields, including image processing and fault diagnosis. Although many dedicated FPGA accelerators have been proposed for specific networks, such as CNN or SVM, few of them have focused on CNN-SVM. Furthermore, the existing accelerators do not support CNN-SVM, which limits their application scenarios. In this work, we propose a hybrid CNN-SVM accelerator on FPGA. This accelerator utilizes a novel hardware-reuse architecture and unique computation mapping strategy to implement different calculation modes in CNN-SVM so that it can realize resource-efficient acceleration of the hybrid algorithm. In addition, we propose a universal deployment methodology to automatically select accelerator design parameters according to the target platform and algorithm. The experimental results on ZYNQ-7020 show that our implementation can efficiently map CNN-SVM onto FPGA, and the performance is competitive with other state-of-the-art works.

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“…RNN is highly applicable for temporal data or sequential data. CNN has higher feature compatibility than RNN and more powerful than RNN [9].…”

Section: Introductionmentioning

confidence: 99%

An Experimental Analysis on Effect of Noisy Image Datasets on Performance of Deep Learning Models

Krishna¹

2020

Preprint

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Deep Learning is a sub field of Machine Learning which works based on neural network structures. Deep Learning has been increasing the capabilities of Artificial Intelligent systems rapidly in many emerging areas like video analytics, data analytics and autonomous systems. The availability of the labelled data is increased due to enhancements in digital technology. The generation and labelling of training data become easier as many advanced and low-cost sensors are developed. Even though various sensors are available, Noise is the one of the major concerns of the database creation. In case of limited availability of data, Noise can be used to normalize the model to avoid overfit. But in huge databases, noise decreases the inference accuracy of the trained model. So, it is very important to understand the effect of noise on model performance. This paper presents an experimental analysis on the individual and combined effect of noise present in training database and validation database. Here, Standard CIFAR-10 database with 60000 images is used as labelled data. A comparative analysis is made to observe the behavior of trained model in terms of inference accuracy against three types of injected noises such as Gaussian Noise, Salt & Pepper Noise and Speckle Noise at different variance levels.

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An OpenCL-Based Hybrid CNN-RNN Inference Accelerator On FPGA

Cited by 9 publications

References 12 publications

CASSANN-v2: A high-performance CNN accelerator architecture with on-chip memory self-adaptive tuning

CASSANN-v2: A high-performance CNN accelerator architecture with on-chip memory self-adaptive tuning

Hybrid CNN-SVM Inference Accelerator on FPGA Using HLS

An Experimental Analysis on Effect of Noisy Image Datasets on Performance of Deep Learning Models

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