An optimal filter with optional resolution used in incremental ADC for sensor application

An extended-range incremental CT ∑Δ ADC with optimized digital filter

“…According to (5), the ENOB of the ADC I is improved by B ER bits when extended range is applied. In theory, this can be a significant improvement, depending on the resolution of the ADC ER .…”

“…Although several optimal filters have been derived for DT IΣ∆ ADCs [5,15,16], to the authors' knowledge, the digital filter optimization for CT ER-IΣ∆ ADCs has not been treated yet. In this section, optimization tools are employed as an alternative approach to design such filter so as to counteract analogdigital mismatches.…”

“…While the required bandwidth is generally relaxed, the required resolution is, on the other hand, more stringent and varies from 12 to 16 bits, depending on each specific application. These requirements have been successfully covered by incremental sigma-delta (IΣ∆) [1,[4][5][6] and extended-range (ER) IΣ∆ ADCs [7]. From a power consumption perspective, single-loop (SL) high-order ER-IΣ∆ ADCs are especially attractive as they reduce the required number of cycles per conversion when compared to incremental counterparts.…”