2018
DOI: 10.1149/2.0101810jss
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An Oxide Chemical Mechanical Planarization Model for HKMG Structures

Abstract: In order to predict the surface topography, a chip-scale oxide chemical mechanical planarization (CMP) model is proposed in poly opening polishing processing of high-k metal gate (HKMG) structures. A geometrical chemical vapor deposition model is first constructed to describe the influence of design pattern effects on the initial surface profiles of dielectric oxides. Based on contact mechanics, the global pressure distribution is then computed to incorporate the long-range features of design structures and po… Show more

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Cited by 10 publications
(13 citation statements)
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“…Aluminum CMP is a very complex process, which is the synergistic result of chemical corrosion and mechanical grinding. 10 It is also a widely used technology to achieve global planarization. 11 The CMP of aluminum consists of two main steps: 12 stock polishing and final polishing.…”
mentioning
confidence: 99%
“…Aluminum CMP is a very complex process, which is the synergistic result of chemical corrosion and mechanical grinding. 10 It is also a widely used technology to achieve global planarization. 11 The CMP of aluminum consists of two main steps: 12 stock polishing and final polishing.…”
mentioning
confidence: 99%
“…1, the adoption of an aluminum metal gate reduces the channel carrier mobility and mitigates the impact of remote coulomb scattering on the high-k gate dielectric layer. 3,4 However, the 45 nm IC process requires planarization and removal of unwanted films at the nanoscale because of the depth-of-focus limitations of shortwavelength (193/245 nm) optical lithography, and the uniformity of the planarization process must be maintained over a length scale of approximately eight orders of magnitude in 300 mm diameter wafers. These planarization and roughness requirements constitute significant challenges for all IC manufacturers.…”
mentioning
confidence: 99%
“…In chip-scale CMP modeling, the contact pressure distributed on the design patterns is a key parameter in DFM-driven CMP simulation and has a large effect on the MRR and surface topography. 42 As for the above mentioned chip-scale CMP models, there still exist some aspects needed to be pointed out as a basis to explore better solution for CMP simulation. Up to now, chip-scale CMP models only consider one or two aspects of the mechanical abrasion factor and design pattern effect in constructing the removal rate equation and ignoring the influence of the chemical reaction and slurry transport effect, which cannot give a fundamental insight into the polishing mechanism in the CMP process.…”
mentioning
confidence: 99%