2011 IEEE Biomedical Circuits and Systems Conference (BioCAS) 2011
DOI: 10.1109/biocas.2011.6107755
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An ultra low power digital receiver architecture for biomedical applications

Abstract: The emerging biomedical applications urge ultra low power consumption and small size transceivers. In this paper traditional modulations schemes have been studied and compared to a novel modulation scheme called Saturated Analog Signal (SAS), which has been developed specifically for these new applications. This new modulation has been combined with a new design for the receiver in 65nm technology and resulted in a digital CMOS receiver with 10 µW power consumption. The receiver achieved a 500 Kb/s data rate, … Show more

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Cited by 7 publications
(5 citation statements)
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“…The transmitter inherits the flexibility of the modulation, enabling it to dynamically trade power consumption with data rate and range. This modulation increases the bandwidth of the transmitted signal and hence the noise bandwidth but, since the receiver architecture for SAS compensates for noise performance penalty and the overall power consumption and size benefits outweigh this performance loss, the final results show better energy efficiency and smaller implementation size in both the transmit and receive sides [6].…”
Section: Saturated Analogue Signal Modulationmentioning
confidence: 99%
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“…The transmitter inherits the flexibility of the modulation, enabling it to dynamically trade power consumption with data rate and range. This modulation increases the bandwidth of the transmitted signal and hence the noise bandwidth but, since the receiver architecture for SAS compensates for noise performance penalty and the overall power consumption and size benefits outweigh this performance loss, the final results show better energy efficiency and smaller implementation size in both the transmit and receive sides [6].…”
Section: Saturated Analogue Signal Modulationmentioning
confidence: 99%
“…The choice of modulation scheme and transceiver architecture extensively influences these features. This has led to a significant research effort towards reducing the overall power consumption and area occupied by such devices [1][2][3][4][5][6]. Also, since the energy sources for such devices should also occupy a small area (<25 mm 2 ), the peak power available from such sources is also restricted (<5 mW).…”
Section: Introductionmentioning
confidence: 99%
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“…Alternatively, the RF signal is amplified by the RF amplifier and then clipped by a threshold circuit (comparator) to have digital rail level. After the threshold circuit, signal is considered as a digital stream [6]. The digital processing block will use this stream to demodulate baseband signal.…”
Section: Architecture Of the Receivermentioning
confidence: 99%
“…Recently, many low power receivers have been reported [1,2,3,4,5,6,7,8]. The receivers on [1,2] and [4] are down-conversion receivers with on-chip local oscillators and mixers.…”
Section: Introductionmentioning
confidence: 99%