Analog Circuits and Systems Optimization based on Evolutionary Computation Techniques

Barros, Manuel; Guilherme, Jorge; Horta, Nuno

doi:10.1007/978-3-642-12346-7

Cited by 78 publications

(33 citation statements)

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“…An optimization loop usually comprises of a simulator or an equation based model to evaluate the circuit performance at the end of every iteration. A detailed description is available in the literature [23]. Two approaches namely, simulation based and equations based are briefly discussed below.…”

Section: Optimization Based Designmentioning

confidence: 99%

A new approach to sizing analog CMOS building blocks using pre-compiled neural network models

Mendhurwar

Sundani

Aggarwal

et al. 2011

Analog Integr Circ Sig Process

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There has been a constant endeavor towards improving the available circuit design automation tools to match technological advancements in the electronic industry. However, inadequate research efforts in the analog domain are holding back the exploitation of advanced technologies. A dearth of design expertise in the analog domain is the principal driving force for the growth of Design Automation (DA) tools. Transistor sizing is one of the most crucial steps in the analog IC design. In this paper, we put forward a new computer aided design framework for the sizing of transistors in MOS Integrated Circuit (IC) amplifiers by incorporating powerful modeling capabilities of Artificial Neural Networks (ANN). ANNs have proven to be efficient and accurate modeling tools in several applications. The proposed tool is capable of directly computing transistor related design parameters, of the MOS IC amplifier and associated peripheral circuitry. The proposed tool thus avoids several time-consuming simulations and/or tuning runs at the very bottom level of analog IC amplifier implementation, using a given CMOS process. It also reduces manual intervention in the design process, thus enhancing the automation of the design process. This paper presents design examples of several analog IC functional modules that are developed and verified successfully.

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Section: Optimization Based Designmentioning

confidence: 99%

A new approach to sizing analog CMOS building blocks using pre-compiled neural network models

Mendhurwar

Sundani

Aggarwal

et al. 2011

Analog Integr Circ Sig Process

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“…is a function that is dependent on the specification type: minimum required value (R min (X)) or maximum required value (R max (X)) [3]. These functions are shown in Fig.…”

Section: Circuit Modelingmentioning

confidence: 99%

“…In this sense, the results presented by [3] with the GENOM tool are passible to comparison, because the same experimental setup can be reproduced -although some implementation details are not available, such as the parameters of the electrical model. This tool is based on a variation of genetic algorithm as the main optimization heuristic.…”

Section: Operational Amplifier Designmentioning

confidence: 99%

Simulated Annealing to Improve Analog Integrated Circuit Design: Trade-Offs and Implementation Issues

Severo¹,

Girardi²,

Oliveira³

et al. 2012

Simulated Annealing - Single and Multiple Objective Problems

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“…Instead, we focus on discrete numerical variables, which are sometimes unavoidable in product design and manufacturing. For example, [3], [4] show that most discrete variables in electronic circuit and system design (e.g., number of fingers of transistors, design grids) are discrete numerical variables and other categories of discrete variables are often not involved. In this paper, we try to obtain combined advantages on efficiency and solution quality for complex EDOD.…”

Section: Introductionmentioning

confidence: 99%

A surrogate model assisted evolutionary algorithm for computationally expensive design optimization problems with discrete variables

Liu

Sun

Zhang

et al. 2016

2016 IEEE Congress on Evolutionary Computation (CEC)

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Abstract-Real-world computationally expensive design optimization problems with discrete variables pose challenges to surrogate-based optimization methods in terms of both efficiency and search ability. In this paper, a new method is introduced, called surrogate model-aware differential evolution with neighbourhood exploration, which has two phases. The first phase adopts a surrogate-based optimization method based on efficient surrogate model-aware search framework, the goal of which is to reach at least the neighbourhood of the global optimum. In the second phase, a neighbourhood exploration method for discrete variables is developed and collaborates with the first phase to further improve the obtained solutions. Empirical studies on various benchmark problems and a realworld network-on-chip design optimization problem show the combined advantages in terms of efficiency and search ability: when only a very limited number of exact evaluations are allowed, the proposed method is not slower than one of the most efficient methods for the targeted problem; when more evaluations are allowed, the proposed method can obtain results with comparable quality compared to standard differential evolution, but it requires only 1% to 30% of exact function evaluations.

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Analog Circuits and Systems Optimization based on Evolutionary Computation Techniques

Cited by 78 publications

References 0 publications

A new approach to sizing analog CMOS building blocks using pre-compiled neural network models

A new approach to sizing analog CMOS building blocks using pre-compiled neural network models

Simulated Annealing to Improve Analog Integrated Circuit Design: Trade-Offs and Implementation Issues

A surrogate model assisted evolutionary algorithm for computationally expensive design optimization problems with discrete variables

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