Analog Circuits Using Double-Gate Multilayer MoS<sub>2</sub> Field-Effect Transistor for Sensor Applications

Vasishta, Sudhanva; Xiao, Wang; Rodder, Michael A.; Raghunandan, K. R.; Viswanathan, T.R.; Dodabalapur, Ananth

doi:10.1109/ted.2022.3170283

Cited by 1 publication

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“…In the dual gate structure, the top gate was the main gate controlling the turn-on of the transistors, while the bottom gate was held at a constant negative voltage ( V GS = −15 V). Although the double gate structure has proven to effectively enhance gate control and charge injection, ,− the device characteristics for the back-gate only structure shows clear advantages using the nanospike electrodes (see Figure S4). ,, Figure a–d shows the transfer and output characteristics for both the nanospike and the flat edges FETs with a 50 nm channel length.…”

Section: Resultsmentioning

confidence: 99%

Quasi-1-Dimensional Dual-Gate MoS₂ Field-Effect Transistors with 50 nm Channel Length

Zhou

Yoon

Vasishta

et al. 2023

ACS Appl. Nano Mater.

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Quasi-1-dimensional dual-gate MoS 2 field-effect transistors (FETs) are demonstrated with channels composed of an array of nanospike source/drain electrodes. This geometry creates an effect of electric field tailoring and can laterally confine the conducting channel into charge nanoribbons. Due to effective lateral charge confinement below threshold, MoS 2 transistors with 50 nm channel length show greatly improved gate control when compared to conventional FETs with flat edge source/ drain electrodes of the same channel length. The device design also results in reduced drain induced barrier lowering and high intrinsic gain of 91 dB. Patterning of the source/drain electrodes into an array of nanospikes results in a reduction of charge injection perimeter without significant change in on-current and contact resistance. More importantly, these advantages are achieved without etching the semiconductor into nanoribbons, which typically results in enhanced scattering. The proposed device geometry is well suited for scaling down to channel lengths much smaller than 50 nm, especially when used with symmetric double gating or single gate FETs with high-k gate dielectrics.

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Section: Resultsmentioning

confidence: 99%

Quasi-1-Dimensional Dual-Gate MoS₂ Field-Effect Transistors with 50 nm Channel Length

Zhou

Yoon

Vasishta

et al. 2023

ACS Appl. Nano Mater.

Self Cite

View full text Add to dashboard Cite

show abstract

Analog Circuits Using Double-Gate Multilayer MoS₂ Field-Effect Transistor for Sensor Applications

Cited by 1 publication

References 23 publications

Quasi-1-Dimensional Dual-Gate MoS₂ Field-Effect Transistors with 50 nm Channel Length

Quasi-1-Dimensional Dual-Gate MoS₂ Field-Effect Transistors with 50 nm Channel Length

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Analog Circuits Using Double-Gate Multilayer MoS2 Field-Effect Transistor for Sensor Applications

Cited by 1 publication

References 23 publications

Quasi-1-Dimensional Dual-Gate MoS2 Field-Effect Transistors with 50 nm Channel Length

Quasi-1-Dimensional Dual-Gate MoS2 Field-Effect Transistors with 50 nm Channel Length

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Product

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Analog Circuits Using Double-Gate Multilayer MoS₂ Field-Effect Transistor for Sensor Applications

Quasi-1-Dimensional Dual-Gate MoS₂ Field-Effect Transistors with 50 nm Channel Length

Quasi-1-Dimensional Dual-Gate MoS₂ Field-Effect Transistors with 50 nm Channel Length