Analog CMOS integrated circuits for high-temperature operation with leakage current compensation

Mizuno, Kiyonori; Ohta, Norikazu; Kitagawa, Fumitaka; Nagase, Hiroshi

doi:10.1109/hitec.1998.676758

Cited by 14 publications

(10 citation statements)

References 1 publication

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“…As concluded in Sect. 2.4, if similar matching to that of [6] was achieved, this failure mode should occur for Type RN circuits at a temperature approximately 60 C higher than the temperature at which this happens for Type R circuits. However, the temperature sweeps performed in this work do not examine such high temperatures.…”

Section: Failure Modesmentioning

confidence: 70%

“…This leakage can then be mirrored so that equal amounts of leakage is leaking into a node as is leaking out of it. Mizuno et al demonstrated such a compensation circuit in [6]. Because the direction of net leakage current in the Mizuno circuit (towards ground) is different from that in this work (towards supply), a modified circuit was presented in our previous work [7] and further extended in this work to compensate for one additional leaking transistor, M S2 .…”

Section: Effects Of Collector-base Body-drain and Sourcebody Leakagementioning

confidence: 85%

“…In their work, Mizuno et al have demonstrated matching of leakage currents with an error of 5% [6]. This increased the temperature operating range by 20 C compared to using a simple current mirror as compensation circuit, by 40 C compared to using a diode directly and by 60 C compared to not using any leakage current compensation at all.…”

Section: Matching Of Leakage Currentsmentioning

confidence: 99%

“…The only currents flowing in the circuit are leakage current and compensation current (mirrored leakage current). The circuit is based on the work of Mizuno et al [6] described earlier in this section consists of two temperature-dependent components; a linear part, due to bias current, and an exponential part, due to leakage current [7]. The power consumption can be written as…”

Section: Power Consumption Of Low-power Hightemperature Bandgap Sensorsmentioning

confidence: 99%

See 3 more Smart Citations

High-temperature characterisation and analysis of leakage-current-compensated, low-power bandgap temperature sensors

Nilsson

Borg

Johansson

2017

Analog Integr Circ Sig Process

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This paper analyses leakage current compensation techniques for low-power, bandgap temperature sensors. Experiments are conducted for circuits that compensate for collector-substrate, collector-base, bodydrain and source-body leakage currents in a Brokaw bandgap sensor. The sensors are characterised and their failure modes are analysed at temperatures from 60 to 230 C. It is found that the most appropriate compensation circuit depends on the accuracy requirements of the application and on whether a stable reference voltage is required by other parts of the circuit. Experiments show that the power consumption is dominated by leakage current at high temperatures. One type of sensor was seen to consume 260 nW at 60 C, 2:1 lW at 200 C and 14 lW at 230 C. This work is motivated by the need to accurately monitor the temperature of power semiconductors in order to predict emerging faults in power semiconductor modules, a task for which cheap, single-chip, low-power, hightemperature, wireless bandgap temperature sensors are appropriate.

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Section: Failure Modesmentioning

confidence: 70%

Section: Effects Of Collector-base Body-drain and Sourcebody Leakagementioning

confidence: 85%

Section: Matching Of Leakage Currentsmentioning

confidence: 99%

Section: Power Consumption Of Low-power Hightemperature Bandgap Sensorsmentioning

confidence: 99%

See 2 more Smart Citations

High-temperature characterisation and analysis of leakage-current-compensated, low-power bandgap temperature sensors

Nilsson

Borg

Johansson

2017

Analog Integr Circ Sig Process

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“…The LDOP and LDON modules are used to generate Vp and Vn, respectively. In order to reduce current leakage, which increases with temperature, various compensation measures have been adopted for different designs [13,14]. However, the effectiveness of these methods is very limited.…”

Section: Voltage Reference Generatormentioning

confidence: 99%

A High-Temperature, Low-Noise Readout ASIC for MEMS-Based Accelerometers

Qin

Guo

Qiao

2019

Sensors

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This paper presents the development and measurement results of a complementary metal oxide semiconductor (CMOS) readout application-specific integrated circuit (ASIC) for bulk-silicon microelectromechanical system (MEMS) accelerometers. The proposed ASIC converts the capacitance difference of the MEMS sensor into an analog voltage signal and outputs the analog signal with a buffer. The ASIC includes a switched-capacitor analog front-end (AFE) circuit, a low-noise voltage reference generator, and a multi-phase clock generator. The correlated double sampling technique was used in the AFE circuits to minimize the low-frequency noise of the ASIC. A programmable capacitor array was implemented to compensate for the capacitance offset of the MEMS sensor. The ASIC was developed with a 0.18 μm CMOS process. The test results show that the output noise floor of the low-noise amplifier was −150 dBV/√Hz at 100 Hz and 175 °C, and the sensitivity of the AFE was 750 mV/pF at 175 °C. The output noise floor of the voltage reference at 175 °C was −133 dBV/√Hz at 10 Hz and −152 dBV/√Hz at 100 Hz.

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A sub-1-V, high precision, ultra low-power, process trimmable, resistorless voltage reference with low cost 90-nm standard CMOS technology

Samir¹,

Kussener²,

Rahajandraibe³

et al. 2012

Analog Integr Circ Sig Process

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Analog CMOS integrated circuits for high-temperature operation with leakage current compensation

Cited by 14 publications

References 1 publication

High-temperature characterisation and analysis of leakage-current-compensated, low-power bandgap temperature sensors

High-temperature characterisation and analysis of leakage-current-compensated, low-power bandgap temperature sensors

A High-Temperature, Low-Noise Readout ASIC for MEMS-Based Accelerometers

A sub-1-V, high precision, ultra low-power, process trimmable, resistorless voltage reference with low cost 90-nm standard CMOS technology

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