2021
DOI: 10.1007/s12274-021-3899-5
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Analog ferroelectric domain-wall memories and synaptic devices integrated with Si substrates

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Cited by 34 publications
(23 citation statements)
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“…[27] Important advances enabling precise manipulation of the ferroelectric DW conductivity, half-wave rectification properties, and selective transport in nanocircuits, [2][3][4] which can be written, changed, substituted, and erased as required, have inspired the demonstration of many different DW devices, including memories, artificial neural networks, sensors, and transistors. [5][6][7]28,29] The fundamental principles of DW conduction have been found to include defect aggregation, bending of the electronic bands, and band gap narrowing near the DW regions. [23][24][25][26] The domains at interfaces with LiNbO 3 layers are volatile and return to their pristine original orientations to act as embedded selectors after a write operation is performed, [8] mostly because of polarization termination and lattice imperfections that combine to erase the interfacial DWs and disconnect the inner nonvolatile DW from the two contact electrodes.…”
Section: Introductionmentioning
confidence: 99%
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“…[27] Important advances enabling precise manipulation of the ferroelectric DW conductivity, half-wave rectification properties, and selective transport in nanocircuits, [2][3][4] which can be written, changed, substituted, and erased as required, have inspired the demonstration of many different DW devices, including memories, artificial neural networks, sensors, and transistors. [5][6][7]28,29] The fundamental principles of DW conduction have been found to include defect aggregation, bending of the electronic bands, and band gap narrowing near the DW regions. [23][24][25][26] The domains at interfaces with LiNbO 3 layers are volatile and return to their pristine original orientations to act as embedded selectors after a write operation is performed, [8] mostly because of polarization termination and lattice imperfections that combine to erase the interfacial DWs and disconnect the inner nonvolatile DW from the two contact electrodes.…”
Section: Introductionmentioning
confidence: 99%
“…As topological defects that occur at the atomic level, ferroelectric domain walls (DWs) separate two uniformly polarized regions and provide conductivity in certain specific states. [ 2–29 ] Over the past few decades, the field of ferroelectric DWs has seen unprecedented progress in the development of promising adaptive nanoelectronics technology. [ 27 ] Important advances enabling precise manipulation of the ferroelectric DW conductivity, half‐wave rectification properties, and selective transport in nanocircuits, [ 2–4 ] which can be written, changed, substituted, and erased as required, have inspired the demonstration of many different DW devices, including memories, artificial neural networks, sensors, and transistors.…”
Section: Introductionmentioning
confidence: 99%
“…Switchable polarization makes ferroelectrics indispensable in contemporary electronics. [1][2][3][4][5][6][7] In particular, ultrafast switching [8,9] becomes increasingly important for memory devices, [10,11] neuromorphic computing, [12,13] and telecommunication. [14] To optimize the switching process, one needs to fundamentally understand and control the formation and movement of domain walls (DWs), that is, interfaces between regions with the different polarization directions.…”
Section: Introductionmentioning
confidence: 99%
“…1−5 As a core part of the FTJ, the ferroelectric character is featured with polarization reversal, which is related to pattern errors in memory storage. 3,6,7 To develop ferroelectric random access memory with trace pattern errors, improving electroresistance (ER) is an effective strategy, and the resulting difference between the ON and the OFF states is so notable that a high level of error-tolerant rate is allowed. 3 For acquiring a large ER, we need to strengthen the ferroelectric polarization (P sum ) and difference between screening lengths of two electrodes (Δδ), considering the correlation of ER ∝ P sum Δδ.…”
mentioning
confidence: 99%
“…A ferroelectric tunnel junction (FTJ) allows for a resistance ON/FF switch, and is well-developed into ferroelectric random access memory recently. As a core part of the FTJ, the ferroelectric character is featured with polarization reversal, which is related to pattern errors in memory storage. ,, To develop ferroelectric random access memory with trace pattern errors, improving electroresistance (ER) is an effective strategy, and the resulting difference between the ON and the OFF states is so notable that a high level of error-tolerant rate is allowed . For acquiring a large ER, we need to strengthen the ferroelectric polarization ( P sum ) and difference between screening lengths of two electrodes (Δδ), considering the correlation of ER ∝ P sum Δδ. , An asymmetric tunnel junction is widely developed for the FTJ configuration, and more than 100 of ER is realized so far. , For the polarization enhancement, various extrinsic ferroelectrics are proposed, including charge-order-induced ferroelectrics based on LaVO 3 /SrVO 3 superlattices and LuFe 2 O 4 . Both the intrinsic and the extrinsic ferroelectrics are usually characterized by the second-order phase transition. The Landau free energy ( F L ) of these samples is dependent on the external electric field, where the polarization serves as order parameter.…”
mentioning
confidence: 99%