Analog Interfaces for Digital Signal Processing Systems

Eynde, F. Op 't; Sansen, Willy

doi:10.1007/978-1-4615-3256-9

Cited by 43 publications

(21 citation statements)

References 0 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Single-stage second-order modulators using single-bit quantization have been shown to be tolerant to integrator gain error as large as 20% [16]. In single-bit modulators, offset error at the comparator (used to implement the single-bit A/D) is stored in the integrator immediately proceeding it [15], making the modulator largely insensitive to comparator offset. MASH cascaded modulators require matching between the analog-gain from the first-stage integrators and the digital-gain in the error cancellation stage.…”

Section: Modulator Topologymentioning

confidence: 99%

“…Of interest to high-temperature design is that single-stage and MASH cascaded modulators differ significantly in their theory of operation; single-stage modulators are generally more resistant to analog circuit impairment than cascaded designs [14], [15]. Single-stage second-order modulators using single-bit quantization have been shown to be tolerant to integrator gain error as large as 20% [16].…”

Section: Modulator Topologymentioning

confidence: 99%

See 1 more Smart Citation

A 14-bit high-temperature ΣΔ modulator in standard cmos

Davis¹,

Finvers²

2003

IEEE J. Solid-State Circuits

View full text Add to dashboard Cite

Experimental verification is given for the use of 61 modulation for high-temperature applications ( approximately 150 C) in a standard CMOS process. Switched-capacitor circuits are used to implement a second-order single-stage and a third-order 2-1 MASH 61 modulator with single-bit quantization. The two modulators have an oversampling ratio of 256 with an input signal bandwidth of 500 Hz. The modulators were fabricated in a 1.5-m standard CMOS technology. A fully differential signal path and near minimum sized switches are used to mitigate the effect of large junction-to-substrate leakage current present at high temperatures. Experimental results show both modulators are capable of over 14 bits of resolution at 225 C and over 13 bits of resolution at 255 C. Results show that the single-stage modulator is more resistant to high-temperature circuit impairment than is the MASH cascaded structure.

show abstract

Section: Modulator Topologymentioning

confidence: 99%

Section: Modulator Topologymentioning

confidence: 99%

A 14-bit high-temperature ΣΔ modulator in standard cmos

Davis¹,

Finvers²

2003

IEEE J. Solid-State Circuits

View full text Add to dashboard Cite

show abstract

“…Signal processing based on bit-streams requires an understanding of the operation of ∆Σ-Ms. In a classical analog-to-digital conversion setup, a ∆Σ-analog-to-digital converter is comprised of two elements, i.e., the ∆Σ-M and a low-pass filter with decimation, as shown in Figure 1 [9,10]. By omitting the low pass filter and directly operating on the high frequency (≥ 10 MHz) bit-stream (BS) [5,8,[11][12][13], a larger small signal bandwidth is achieved, e.g., in control loops.…”

Section: Delta-sigma Modulatorsmentioning

confidence: 99%

“…While first order ∆Σ-Ms are always stable, for higher-order ∆Σ-Ms the feedback coefficients to individual stages have to be designed carefully to stabilize the feedback loops [10,14]. Several design methods are known from literature [9,10,15,16]. In this work second order ∆Σ-Ms as proposed in [16] and shown in Figure 2 are used.…”

Section: Delta-sigma Modulatorsmentioning

confidence: 99%

Algebraic Operations on Delta-Sigma Bit-Streams

Klein

Schumacher

2018

MCA

View full text Add to dashboard Cite

Operations in the Delta-Sigma ( Δ Σ ) domain are a broad field of research. In this article the main, focus is on applications in control systems, nevertheless the results are generally applicable for dssp in other fields. As the bit-stream does not have an instantaneous value, algebraic operations cannot be executed directly. The first approaches were made in the 1980s based on small-scale integration logic chips by Kouvaras and by Lagoyannis. Further algebraic operations and other implementations were introduced by Zrilic, by Ng, by Bradshaw and by Homann. Other publications utilize complex networks and operations to achieve the desired algebraic operations. These presented operations can be divided into different operation classes by the based implementation idea. In this paper, the known algebraic operation classes are further developed and new operation classes are presented. All implementations are compared and evaluated. For linear operations in control applications, the introduced Bipolar Interpretation is best rated. It compensates for the signal offset of bipolar bit-streams and results in the best signal quality by mapping the logic values true and false of bit-stream to plus and minus one before the algebraic operation. The output of the algebraic operation is a multibit value, to achieve a bit-stream as output value a third step is taken. The result is modulated by a digital dsm. For nonlinear operations the most universal implementation is also based on three steps. In the first stage, the bit-streams are processed with short sinc 3 filters, resulting in multibit values. This signal is processed by digital signal processing (DSP). The output stage is a dsm. For some nonlinear algebraic operations there can be better solutions than DSP, like shown for limiting. In short, this paper gives a detailed overview about different dssp classes for linear and nonlinear operations. Newly presented are the scaling with Bit-Stream Modification, the Bipolar Interpretation class, the nonlinear operation class based on dsp, the modified multiplication based on Delta Adder and benchmarks of all presented operations.

show abstract

“…From the other side conversion speed mainly depends on the switching delay time [2]. With the laser trimming technology it is possible to improve the converter accuracy [3], but aging and environmental factors decrease linearity and overall accuracy of a converter, and reduce its applicability.…”

Section: Introductionmentioning

confidence: 99%