2021
DOI: 10.1016/j.physe.2021.114915
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Analog/RF performance assessment of ferroelectric junctionless carbon nanotube FETs: A quantum simulation study

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Cited by 27 publications
(18 citation statements)
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“…Figure 11 a shows an EDJL-CNTTFET design with a MFMIS structure. Note that the MFMIS can be integrated as a coaxial gate [ 42 ] or used as separate gating system ideally connected by a wire [ 25 , 38 , 41 , 43 ]. From simulation point of view, the ferroelectric field-effect transistors endowed with a MFMIS system can be treated as a baseline field-effect transistor in series with a ferroelectric capacitor [ 25 , 40 , 41 , 42 , 43 , 44 ].…”
Section: Resultsmentioning
confidence: 99%
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“…Figure 11 a shows an EDJL-CNTTFET design with a MFMIS structure. Note that the MFMIS can be integrated as a coaxial gate [ 42 ] or used as separate gating system ideally connected by a wire [ 25 , 38 , 41 , 43 ]. From simulation point of view, the ferroelectric field-effect transistors endowed with a MFMIS system can be treated as a baseline field-effect transistor in series with a ferroelectric capacitor [ 25 , 40 , 41 , 42 , 43 , 44 ].…”
Section: Resultsmentioning
confidence: 99%
“…Note that the MFMIS can be integrated as a coaxial gate [ 42 ] or used as separate gating system ideally connected by a wire [ 25 , 38 , 41 , 43 ]. From simulation point of view, the ferroelectric field-effect transistors endowed with a MFMIS system can be treated as a baseline field-effect transistor in series with a ferroelectric capacitor [ 25 , 40 , 41 , 42 , 43 , 44 ]. Therefore, conceptually, the numerical modeling of the negative capacitance (MFMIS) nanodevices is divided into two parts [ 45 ].…”
Section: Resultsmentioning
confidence: 99%
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