Analysis and design of a push–pull DCM boost power factor corrector

Lo, Yu‐Kang; Lin, Jing‐Yuan; Lin, Chung-Yi; Cheng, Sui Sun; Chiu, Huang-Jen

doi:10.1002/cta.808

Cited by 3 publications

(2 citation statements)

References 23 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…It consists of power factor correction circuit as the front end converter and a half bridge voltage fed resonant inverter to control the lamp current. Even though this can achieve high power factor at the input, it requires three MOSFETs in the power circuit [30,31]. The resulting circuit has more losses and is costly.…”

Section: Introductionmentioning

confidence: 99%

High power factor electronic ballast using resonant converter for compact fluorescent lamp

Ramadas¹,

N²,

Yesuraj³

et al. 2016

Circuit Theory & Apps

View full text Add to dashboard Cite

SUMMARYThis paper proposes a novel single stage single switch resonant inverter with high power factor for electronic ballast. The power factor correction circuit is at the input side. It is designed to operate at discontinuous conduction mode. The lamp power is controlled by adjusting the duty ratio of the active switch of the power factor correction circuit. The circuit operation is analyzed in detail to derive the design equations. Circuit parameters are designed based on design considerations. Finally, prototype electronic ballast for a 40-W compact fluorescent lamp is built and tested. The efficiency and the performance of the proposed converter are verified for the designed prototype.

show abstract

Section: Introductionmentioning

confidence: 99%

High power factor electronic ballast using resonant converter for compact fluorescent lamp

Ramadas¹,

N²,

Yesuraj³

et al. 2016

Circuit Theory & Apps

View full text Add to dashboard Cite

show abstract

“…They are popular in low power applications (<250 W) such as the single-stage flyback and forward converters [1][2][3]. However, researches on the single-stage full-bridge (SSFB) converters, which are used in higher power applications (>500 W), are more challenging because of the larger variation in output load [4].…”

Section: Introductionmentioning

confidence: 99%

Magnetic flux density bias analysis and suppression strategy for voltage‐fed single‐stage full‐bridge converter

Zhang

Qian

et al. 2016

Circuit Theory & Apps

View full text Add to dashboard Cite

Power transformer in the voltage-fed single-stage full-bridge (SSFB) converter is easy to be saturated because of the special operating mode of this topology. First and foremost, detailed analysis about the generation mechanism of the transformer saturation in the voltage-fed SSFB converter is presented for the first time in this paper. Second, the mathematical expression of the maximum value of magnetic flux density bias (MFDB) during every line cycle is deduced. Furthermore, a novel suppressing strategy, consisted of the digital compensating algorithm and design considerations, is proposed based on the theoretical analysis and mathematical expression. The MFDB can be eliminated and additional circuits are not needed with the proposed strategy. Finally, a 1 kW prototype with the voltage-fed SSFB topology is built to verify the effect of the proposed approach. The voltage-second imbalance is reduced to less than 1% using the proposed suppression strategy compared with 14% when the strategy is not used. Consequently, the system reliability and the efficiency are improved. research is seldom studied comprehensively. In [10], the flux density bias problem is mentioned, and a protection circuit is used to limit the maximum magnetizing current. Detailed theoretical analysis is not involved, and the efficiency is still affected.In this paper, the generation principle of the MFDB is analyzed in detail. Then the mathematical expression of the maximum MFDB is deduced. Based on these theoretical analyses, a novel strategy is developed to avoid the transformer saturation in the voltage-fed SSFB converter. The paper is organized as follows. In Section 2, the principle of flux density bias generation is analyzed. Besides, the maximum MFDB is calculated in this section. Section 3 gives several conventional solutions for suppressing the MFDB. The proposed suppressing strategy including design consideration is presented in Section 4. In Section 5, a 1-kW prototype with voltage SSFB topology is built and tested. With the proposed strategy, the system reliability is improved, and the efficiency is increased. The conclusions are given in Section 6. GENERATION MECHANISM OF THE MFDBThe circuit diagram of the voltage-fed SSFB converter is shown in Figure 1. The two bridge legs of the full-bridge converter are composed of four transistors, Q 1 , Q 2 , Q 3 and Q 4 , in which, Q 2 and Q 4 are also used to perform the same current-shaping function as the switch in a boost converter. Components D S1 , D S2 , L 1 and L 2 make up a semi-bridgeless converter. The power transformer T r , resonant inductance L r (including the leakage inductance), output rectifier diodes D R1 and D R2 , output filter inductance L O and capacitance C O make up a standard full-bridge converter [11][12][13]]. An energy store capacitor C F is placed across the primary-side dc bus. MFDB generation mechanismThe MFDB occurs when the voltage-second balance of the magnetizing inductance is not achieved. Actually, this phenomenon may occur in most full-bridge converter b...

show abstract