Analysis and design of a stacked power amplifier with 196% fractional bandwidth using equivalent circuit model

Abstract

Stacked structure is a good solution to overcome the low output voltage swing provided by a single device. When several devices are stacked, the bandwidth and output power are multiple times higher. This article analyzes the small‐signal voltage gain of the stacked structure, deriving the gain expression of the high‐frequency model and simplified model. Based on the specific device parameter, the different small‐signal voltage gains between the two models are compared and the designed stacked structure is proved to obtain a flat gain at low frequencies below about 3 GHz. To our best knowledge, this is the first article to analyze the gain flatness of stacked structure with two equivalent circuit models. To verify the stacked theory, a pseudomorphic high‐electron‐mobility transistor（PHEMT） power amplifier (PA) is implemented using 0.25 μm Gallium arsenide (GaAs) technology. The PA achieves an ultra‐high bandwidth of 30 MHz to 3 GHz and a linear gain of 21 dB ± 1.5 dB. At a 16‐V drain bias voltage, a saturated output power of higher than 2 W and a peak power‐added efficiency (PAE) of 44.1% are attained.

A power amplifier with bandwidth expansion and linearity enhancement in 130 nmcomplementary metal‐oxide‐semiconductorprocess

“…R f is the feedback resistor used to adjust the input impedance of PA. Define the V out as output voltage, then the gain of PA with LCDR input matching network can be expressed as follows 32 : In order to simplify the analysis process, the parasitic effect is ignored. R 1 and R 2 are regarded as infinity, R 3 and R 4 are set to zero.…”