Analysis and Design of Integrated Blocks for a 6.25 GHz Spacefibre PLL

Abstract

The design of a Phase-Locked Loop (PLL) to generate the clock reference for the new Spacefibre standard is presented in this paper. Spacefibre has been recently released by the European Space Agency (ESA) and supports up to 6.25 Gbps for on-board satellite communications. Taking as a starting point a rad-hard 6.25 GHz Voltage Controlled Oscillator in 65 nm technology, this work presents the design of the key blocks for an integrated PLL: a Triple Modular Redundancy Phase/Frequency Detector, a Charge Pump, and a passive Loop Filter. The modeling activities carried out in an Advanced Design System have proven that the proposed PLL can be completely integrated on-chip, with a Loop Filter area consumption of only 6000 µm2 (considering the 65 nm technology). The design of active circuits has been carried out at the transistor level in a Cadence Virtuoso environment, implementing both system and layout rad-hard techniques, and different solutions are discussed in this paper. As a result, a compact (0.09 mm2), low power (10.24 mW), dead zone free and rad-hard PLL is obtained with a Phase Noise below −80 dBc/Hz @ 1 MHz. A preliminary block view and floor plan of the test chip is also proposed.

An Integrated Charge Pump for Phase-Locked Loop Applications in Harsh Environments

“…The CP proposed in this work, instead, occupied an area of only 144 µm 2 , and it was able to reach temperatures up to 200 • C and TID up to 100 Mrad with a current variation limited to 8% for the maximum temperature and 2.5% for the maximum TID level at 25 • C. However, its high robustness was paid in terms of current matching performance, even though the obtained performance was acceptable for most CP-PLL applications [27,28].…”

Asymmetric 5.5 GHz Three-Stage Voltage-Controlled Ring-Oscillator in 65 nm CMOS Technology

“…The most widely used system for generating the clock signal within an integrated system is the Phase-Locked Loop [8,9]. This system makes it possible to stabilize the high-frequency signal generated by a Voltage-Controlled Oscillator (VCO) with a very precise reference signal, but with a frequency that is too low for the application.…”

Recent Trends on Applications of Electronics Pervading the Industry, Environment and Society

“…The Special Issue is characterized by 13 original research papers [ 1 , 2 , 3 , 4 , 5 , 6 , 7 , 8 , 9 , 10 , 11 , 12 , 13 ] that we briefly introduce in the following.…”

“…The third paper [ 3 ] is entitled “Analysis and Design of Integrated Blocks for a 6.25 GHz SpaceFibre PLL” and is written by M. Mestice at al., with authors from the University of Pisa and by INFN (the Italian National Institute for Nuclear Physics).…”