Analysis and Design of VCO-Based Neural Front-End With Mixed Domain Level-Crossing for Fast Artifact Recovery

Liu, Huaiyu; Lin, Yang; Qi, Liang; Lou, Yongwei; Wang, Guoxing; Liu, Yan

doi:10.1109/tcsi.2022.3225559

Cited by 3 publications

(2 citation statements)

References 43 publications

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“…Voltage‐controlled oscillator (VCO) based direct digitalization technique translates voltage signals into the time domain via digital standard cells, showing its superiority, especially in the advanced fabrication process node [128–133] . Such direct digitization architecture results in greater area and energy efficiency because of its compatibility with process scaling.…”

Section: High‐density Neural Recording Chipsmentioning

confidence: 99%

“…first reported that the VCO‐based direct digitalization (VCO‐DD) architecture achieves area and energy efficiency of 0.135 mm 2 /channel and 11.3 μA/channel, respectively [129] . With a shift‐register‐based optimization, they further reduce to 0.12 mm 2 /channel and 10 μA/channel [130] . It is then optimized to 0.08 mm 2 /channel and 3.41 μA/channel, competing with a TDM architecture [131] .…”

Section: High‐density Neural Recording Chipsmentioning

confidence: 99%

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High‐density implantable neural electrodes and chips for massive neural recordings

Wang,

Suo,

Wang

et al. 2024

Brain-X

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High‐density neural recordings with superior spatiotemporal resolution powerfully unveil cellular‐scale neural communication, showing great promise in neural science, translational medicine, and clinical applications. To achieve such, many design and fabrication innovations enhanced the electrode, chip, or both for biocompatibility improvement, electrical performance upgrade, and size miniaturization, offering several thousands of recording sites. However, an enormous gap exists along the trajectory toward billions of recording sites for brain scale resolution, posing many more design challenges. This review tries to find possible insight into mitigating the gap by discussing the latest progress in high‐density electrodes and chips for neural recordings. It emphasizes the design, fabrication, bonding techniques, and in vivo performance optimization of high‐density electrodes. It discusses the promising opportunities for circuit‐level and architecture‐level multi‐channel chip design innovations. We expect that joint effort and close collaboration between high‐density electrodes and chips will pave the way to high‐resolution neural recording tools supporting cutting‐edge neuroscience discoveries and applications.

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Section: High‐density Neural Recording Chipsmentioning

confidence: 99%