Analysis and Geometric Optimization of Single Electron Transistors for Read-Out in Solid-State Quantum Computing

Abstract

The single electron transistor (SET) offers unparalled opportunities as a nano-scale electrometer, capable of measuring sub-electron charge variations. SETs have been proposed for read-out schema in solid-state quantum computing where quantum information processing outcomes depend on the location of a single electron on nearby quantum dots. In this paper we investigate various geometries of a SET in order to maximize the device's sensitivity to charge transfer between quantum dots. Through the use of finite element modeling we model the materials and geometries of an Al/Al 2 O 3 SET measuring the state of quantum dots in the Si substrate beneath. The investigation is motivated by the quest to build a scalable quantum computer, though the methodology used is primarily that of circuit theory. As such we provide useful techniques for any electronic device operating at the classical/quantum interface.

New Current-Mode Ternary Full Adder Circuits Based on Carbon Nanotube Field Effect Transistor Technology

“…[11][12][13] MOSFET technology has been the superior technology supplying the necessary potentials for implementing energy-efficient and dense VLSI circuits, meanwhile the necessity of scaling down the feature size of CMOS technology in Nano-ranges in today's nanometer VLSI 0 0 0 1 0 1 2 0 2 3 1 0 4 1 1 5 1 2 6 2 0 industry emerging, gives rise to numerous difficulties. To overcome these challenges, many nanometer devices such as Single Electron Transistor (SET), 14 Quantum-dot Cellular Automata (QCA), 15 and Carbon Nanotube Field Effect Transistor (CNTFET), 16 17 have been recently presented. Meanwhile Carbon Nano Tube Field Effect Transistor (CNTFET) has been considered as the most talented successor to the MOS technology in the near future.…”

Multiplexing single electron transistors for application in scalable solid-state quantum computing

“…The above relations allow the determination of the current through the SET for the full SET-2QD system for any voltage on the electrodes. We calculate the current based on a standard master equation approach [22] using the rate of change of the number of electrons on the island. The rate at which electrons tunnel from the island to the drain, given n electrons occupy the island is given by,…”

“…Standard designs for SETs usually have a relatively large footprint ( 10 4 nm 2 [17]), which with attendant control gates may be problematic in terms of spacing in the original Kane 1-D [4] and the scalable 2-D [18] QC architectures. Antenna structures [20,21,22] may be of some assistance in packing in all the required elements, however, as the number of readout elements is increased from proof of principle devices to fully operational QCs, we believe a degree of multiplexed functionality will be very advantageous.…”

“…We work in the steady state regime where the current through the SET is modeled via energy minimization arguments of the entire system, following the orthodox theory of single electron tunneling [14,22]. We begin our discussion by presenting data from a SET model without the QDs.…”

“…Following Ref. 22, we determine the current through a SET, ignoring cotunneling processes. Coulomb blockades are shown in Fig.…”