Analysis and Modeling of a Gain-Boosted N-Path Switched-Capacitor Bandpass Filter

Lin, Zhicheng; Mak, Pui-In; Martins, Rui P.

doi:10.1109/tcsi.2014.2312476

Cited by 67 publications

(33 citation statements)

References 14 publications

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“…where k = ± 1, ± 2,… Any N-path circuits can be analyzed by calculating the impulse response of the circuit and using Equations (5) and (7). In order to provide a detailed analysis, two conventional cases can be addressed: a.…”

Section: N-path Circuit Analysis Using Impulse Responsementioning

confidence: 99%

“…The folding functions of N-path circuit, ie, Z kN (f ), can be expressed by utilizing (7) as follows:…”

Section: N-path Circuit Analysis Using Impulse Responsementioning

confidence: 99%

“…The output of the filter shows bandpass characteristic around the switching frequency. However, in general, the N‐path filter can exhibit different frequency response, eg, by adding active components or inductors to the filter configuration or altering the component arrangements …”

Section: Introductionmentioning

confidence: 99%

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Analysis of nonidealities of N‐path circuits using impulse response

Mohammadpour

Nabavi

2020

Circuit Theory & Apps

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Summary This paper presents a new method to analyze nonidealities of N‐path circuits. This method utilizes Fourier transform of the impulse response of an N‐path circuit in the time domain to calculate the transfer functions. The time domain analysis makes the method simple and intuitive. Instead of conventional sophisticated calculations, this method limits the analysis to some integral calculations. This analysis can take into account two common nonidealities: parallel capacitance and overlapping clocks. The accuracy of the analysis is verified by simulations for both cases. Further, the analysis has been expanded to differential filters.

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Section: N-path Circuit Analysis Using Impulse Responsementioning

confidence: 99%

“…The folding functions of N-path circuit, ie, Z kN (f ), can be expressed by utilizing (7) as follows:…”

Section: N-path Circuit Analysis Using Impulse Responsementioning

confidence: 99%

See 1 more Smart Citation

Analysis of nonidealities of N‐path circuits using impulse response

Mohammadpour

Nabavi

2020

Circuit Theory & Apps

View full text Add to dashboard Cite

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“…While such system-level simplifications can decrease power consumption, they may not be sufficient to meet ULP power budget constraints. Thus, efforts have been made to further lower the power consumption in such architectures by replacing a PLL with a clever method of frequency synthesis [34][35][36], lowering the supply voltage [17,37,38], and replacing the LNA with a passive mixer front end [17]. Figure 9 shows an example of a representative FBAR-based multi-channel super-heterodyne receiver architecture [36].…”

Section: Clocked Demodulatormentioning

confidence: 99%

Introduction to Ultra Low Power Transceiver Design

Lee

Mercier

2015

Integrated Circuits and Systems

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Design of radios with ultra-low-power consumption can enable many new and exciting applications ranging from wearable healthcare to Internet of Things devices and beyond. Achieving low power operation is usually an exercise in trading-off important performance metrics with power. This chapter presents an overview of state-of-the-art narrowband architectures and techniques that achieve ultra-low-power operation, and concludes with a section that benchmarks recent state-of-the-art designs in order to illustrate power-performance trade-offs.

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“…The remarkable property of tuning the center frequency along with the successful implementations in terms of noise, linearity, and power consumption have made N-path filters an attractive choice in wireless receivers. [7][8][9][10][11][12][13] This kind of filters are aimed to be used as high Q filters to replace the conventional bulky surface acoustic wave (SAW) filters in wireless systems. This can result in significant reduction of the filter size and its implementation costs.…”

Section: Introductionmentioning

confidence: 99%

A method for rejecting 3k‐th harmonics in bandpass 6N‐path filters

Hazrati

Jalali

Meghdadi

et al. 2020

Circuit Theory & Apps

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Summary In this paper, a method for 3 k‐th ( k∈double-struckN) harmonics rejection in 6 N‐path filters is proposed, and the related analysis is provided. Using a single‐ended‐input to differential‐output structure, the filter selectivity around even harmonics are also suppressed. Accordingly, a proof‐of‐concept band‐pass filter is designed, and postlayout simulations in the 90‐nm CMOS technology are carried out, which covers an input frequency range from 200 MHz to 1.2 GHz with a channel bandwidth of 10 to 15.5 MHz. The achieved third harmonic rejection at 1‐GHz local oscillator (LO) frequency is about 43 dB. Over the entire radio frequency (RF) range, the in‐band IIP3 and noise figure are better than −1.5 dBm and 5.3 dB, respectively. The power consumption of the analog circuitry is 21 mW from the 1.2‐V supply, whereas the digital clock generation circuitry consumes between 0.9 and 5.2 mW, depending on the center frequency of the filter.

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Analysis and Modeling of a Gain-Boosted N-Path Switched-Capacitor Bandpass Filter

Cited by 67 publications

References 14 publications

Analysis of nonidealities of N‐path circuits using impulse response

Analysis of nonidealities of N‐path circuits using impulse response

Introduction to Ultra Low Power Transceiver Design

A method for rejecting 3k‐th harmonics in bandpass 6N‐path filters

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