Analysis and Simulation of Functional Stress Degradation on VDOMS Power Transistors

Abstract

The use of VDMOS transistor under certain functional stress conditions produces a modification of its physical and electrical properties. This paper explores the physical analysis and SPICE simulation of the degradation effects related to the component micronic structure, and points out the degraded parameters following this stress.

2D analysis of functional stress degradations on power VDMOS transistor

“…It appears that the value V max ¼ 76; 000 cm 2 =V s before stress is being reduced after stress to a value of 52,000 cm 2 /V s (Figure 5). This does confirm the analysis done which relates the characteristics of degradation to the problem of the mobility modulation inside the channel (Zoaeter et al, 2002). Gate charge test.…”

“…In order to obtain the functional stress conditions, we have designed an experimental device to simulate the "normal" conditions of the coercive use of the VDMOS within an inverter circuit (Zoaeter et al, 2002) (Figure 2). The control circuit permits variation of the frequency, the cyclic ratio and the amount of the gate driving-voltage.…”

“…The V T voltage corresponds to a particular value of the gate voltage, beyond which the transistor begins to conduct (Grove, 1967). The increase of V T is performed by negative trapped charges in the oxide due to the electric stress (Zoaeter et al, 2002). Their presence affects the conduction in the channel.…”

“…Waveforms of the output characteristics I D ¼ f ðV DS Þ (Figure 4) present the decreasing of the saturation current which is performed by the modulation phenomenon of the carrier mobility in the inversion layer (Zoaeter et al, 2002). The level of the saturation current is determined by the value of the saturation velocity.…”

Comparative analysis of accelerated ageing effects on power RF LDMOS reliability

“…This step should allow us to correlate ageing to any model parameter drift, or even to help identify a degradation phenomenon [6]. A commercial Motorola RF LDMOS has been used for this study.…”