Analysis of 0–9 kHz Current Harmonics in a Three-Phase Power Converter Under Unbalanced-Load Conditions

Abstract

The unbalanced condition of typical loads in industrial networks could affect the current harmonics across the dc-link in Adjustable Speed Drives (ASDs). These current harmonics could pass through the dc-link and create new current harmonics at the grid side. Thus, the effect of unbalancedload condition on the current harmonics across the dc-link needs to be considered in the design process. Moreover, new compatibility levels and emission limits will be developed for the 2-9 kHz current harmonics, so drives need to meet these new requirements in future. These current harmonics could also be significantly affected by the load power factor at the unbalanced-load condition. Due to these reasons, analysing the effect of unbalanced-load and load power factor on the current harmonics between 0 to 9 kHz across the dc-link is vital. Thus, this paper presents an analytical approach for estimating the current harmonics of the inverter at the dc side considering unbalanced-load currents. The proposed mathematical equations are then validated with experimental results. These analyses reveal that the negative-sequence current generates new harmonics across the dc-link. Additionally, the relationship between unbalanced currents at the load side and dc-link are found as a function of positive-and negative-sequence currents.

A Precise Model of DC-Link Current in Adjustable Speed Drives for the Harmonic Analysis of Electrical Networks

“…It is worth mentioning that this error decreases for an ASD with SDLC filter configuration, as C dc in SDLC-type filter configuration is much smaller than the conventional-filter type. This capacitor is 500 µF for a 7.5 kW ASD with conventional filter used in this simulations, whereas it is reduced to 30 µF in a SDLC-type filter configuration as described in [28]. Additionally, L dc in the conventional filter type is removed when the SDLC filter is used, hence v rec = v dc at different loading conditions.…”

“…Fig 8 (a) and (b) depict the equivalent circuit of system when conventional type and SDLC type filter topologies are employed. The parameters of L dc and C dc for the conventional and SDLC type filters in these circuits are provided in Table 3 according to [28].…”

“…According to (27), the harmonics at the input of the rectifier, I rec,h affect the value of different current harmonics at the grid side. The variation in the frequency of the harmonics at the DC-side when they are transferred to the grid side can be found according to (25) and (28). Table 4 describes the harmonics at the grid side that are affected by a harmonic among f h1 , f h2 , f h3 at the DC-side of the ASD.…”

“…table demonstrates a at the grid side can be affected by current harmonics at different frequencies in the DC-side due to the nonlinear function of the rectifier. In fact, it can be realized that the frequency of a current harmonic at the DC-side is shifted ±kf g when it is transferred to the grid side according to (28).…”

“…To address this gap in the existing standards, standardization committees, such as IEC SC 77, have considered 2-9 kHz recently to develop emission limits and measurements methods for them [11], [28].…”