Analysis of Embedded Package Capacitors for High Performance Components

Muthana, P.; Matoglu, E.; Pham, N.; Araujo, D.N. de; Mutnury, Bhyrav; Cases, M.; Swaminathan, Madhavan

doi:10.1109/epep.2006.321189

Cited by 5 publications

(2 citation statements)

References 7 publications

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“…Packaging technologies that use capaci- tors embedded in the packages [8,9] or coreless substrate packages [10] could improve the robustness against power noise.…”

Section: Modelling Practice and Evaluation For Prototype Designmentioning

confidence: 99%

Analysis of Complete Power-Distribution Network and Co-Design Optimization

Nose

Kaeko

Takahashi

2009

Transactions of The Japan Institute of Electronics Packaging

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This paper describes the modelling analysis for a power-distribution network and demonstrates co-design and co-simulation in using the detailed prototype model, which includes a chip, package, and printed circuit board. A circuit simulator and a 2D solver using the finite element method are used to study the frequency and transient responses for the core switching noise. In the model, we assume a chip model (current profile and on-chip capacitance) and define the circuit parameters with an equivalent circuit to meet the target impedance. Then the physical design of the package and printed circuit board were done to check all of the required circuit parameters. According to the modelling and evaluation, the package design with a low equivalent series inductance capacitor in the bottom layer and a thin core structure is more advantageous than a capacitor in the top layer.

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“…Packaging technologies that use capaci- tors embedded in the packages [8,9] or coreless substrate packages [10] could improve the robustness against power noise.…”

Section: Modelling Practice and Evaluation For Prototype Designmentioning

confidence: 99%

Analysis of Complete Power-Distribution Network and Co-Design Optimization

Nose

Kaeko

Takahashi

2009

Transactions of The Japan Institute of Electronics Packaging

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“…Using this technique, the distance between the power supply pins of the LSI and the bypass capacitors can be minimized and the inductances between them reduced. There have been numerous studies on embedded technology [4]- [7]. In these references, it is mainly reported that the impedance of power distribution network can be improved by embedding capacitors into the PCB.…”

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confidence: 99%

An evaluation of the immunity characteristics of an LSI with capacitors embedded in an interposer

Sasaki

Saito

Takahashi

et al. 2010

2010 IEEE International Symposium on Electromagnetic Compatibility

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To improve the electrical characteristics of LSIs, we are developing technology for embedding chip capacitors into interposers for LSIs. In this paper, we applied an interposer with embedded capacitors to an image-processing LSI and compared its electrical characteristics with that of a conventional LSI. We confirmed improvements in the timing margin, signal integrity, and immunity characteristics of the LSI. I. INTRODUCTIONPower supply voltages of LSIs are falling, since the manufacturing process for LSIs is progressing toward ultrafine. As a result, very small fluctuations in the power supply voltage cause the LSI to malfunction, making power integrity (hereinafter PI) a severe and growing problem [1]- [3].On the other hand, we need to supply high-frequency currents to LSIs to maintain their performance. We generally use bypass capacitors, which are placed near the LSI on the PCB (printed circuit board) as shown in Fig. 1, as highfrequency current sources. When the operating frequency of an LSI exceeds several hundred MHz, the LSI needs very high frequency currents of over 1 GHz. This makes it impossible to ignore the small inductances between the power supply pins of the LSI and the bypass capacitors, such as via holes, since high-frequency currents cause the power supply voltage to fluctuate in proportion to these inductances. Therefore, to maintain the desired performance of LSIs at higher clock frequencies, we will need to reduce the inductances in the power distribution network to be able to reduce fluctuations in the power supply voltage.We are currently developing the embedded technology of chip capacitors into interposers for LSIs. Using this technique, the distance between the power supply pins of the LSI and the bypass capacitors can be minimized and the inductances between them reduced. There have been numerous studies on embedded technology [4]- [7]. In these references, it is mainly reported that the impedance of power distribution network can be improved by embedding capacitors into the PCB. However, the question of LSI performance has not been examined in these studies.In this study, we applied an interposer with embedded capacitors to an image-processing LSI for digital televisions (Fig. 2) and evaluated the LSI's electrical characteristics.

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AC coupled backplane communication using embedded capacitor

Patel²,

Hunter³

et al. 2008

2008 IEEE-EPEP Electrical Performance of Electronic Packaging

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Surface Mount Capacitors can be replaced with a buried capacitor in backplane interconnect applications requiring blocking capacitance, such as FiberChannel. This replacement improves cost, reliability and parasitic inductance. The smaller nominal capacitance value can be compensated for by using an equalizing receiver filter. Tradeoffs in capacitance choice are explained in detail. A nominal capacitance of around 1 pF provides a good choice for the analyzed scenarios.

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Analysis of Embedded Package Capacitors for High Performance Components

Cited by 5 publications

References 7 publications

Analysis of Complete Power-Distribution Network and Co-Design Optimization

Analysis of Complete Power-Distribution Network and Co-Design Optimization

An evaluation of the immunity characteristics of an LSI with capacitors embedded in an interposer

AC coupled backplane communication using embedded capacitor

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