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Coreless substrate technology has been viewed as the holy grail of organic substrates for a long time. The benefit of this substrate concept is to reach the same level of wireability as in multi-layer ceramic substrates at lower cost and better electrical performance. Most approaches to date were based on materials like ABF or other resin systems with little reinforcement which resulted in substrates which were very prone to warping before die assembly and even more so after die attach. Here, the approach is to pattern plate the circuit pattern on a temporary carrier. In a second step, studs are plated for the future via interconnections. In a third step, prepreg is laminated over the prior structures. If a copper foil is included in the lamination step then the studs are accessed with etching openings in the copper foil and cleaning the top of the pillars to allow a plated connection in a pattern plating process. By repeating the appropriate steps of above on this substructure, a multi-layer coreless substrate can be built. The strength is equivalent to PBGA type substrates of equivalent thickness.

Surface Mount Capacitors can be replaced with a buried capacitor in backplane interconnect applications requiring blocking capacitance, such as FiberChannel. This replacement improves cost, reliability and parasitic inductance. The smaller nominal capacitance value can be compensated for by using an equalizing receiver filter. Tradeoffs in capacitance choice are explained in detail. A nominal capacitance of around 1 pF provides a good choice for the analyzed scenarios.

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