Analysis of multi-layered microelectronic packaging under uniformly distributed loading

Wen, Yujun; Basaran, Cemal

doi:10.1016/s0020-7683(03)00092-1

Cited by 5 publications

(3 citation statements)

References 27 publications

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“…The first layer is BT, the second layer is eutectic Pb/Sn solder, and the third layer is silicon. The proposed analytical model has been verified by Wen and Basaran (2003), [29] using high sensitivity moiré interferometry. The thermal gradient is 50 100.…”

Section: Case Study Of a Multilayered Microelectronic Packagementioning

confidence: 95%

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Analysis of Multilayered Microelectronic Packaging Under Thermal Gradient Loading

Basaran

Wen

2006

IEEE Trans. Comp. Packag. Technol.

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An accurate estimation of interfacial and axial stresses in multilayered structures is important in the design process of microelectronic packaging because these stresses drive the failure modes in the package. During manufacturing, microelectronic packaging devices usually suffer from severe thermal gradients. Design engineers often simplify the thermal gradient case as an isothermal loading case by averaging the temperature of the top and bottom of the microelectronic packaging device. Such simplification usually underestimates the stress level in the devices. With the analytical model presented in this paper, the stresses in multilayered microelectronic packaging devices subjected to thermal gradient loading can easily be predicted. It is shown that ignoring the thermal gradient in the package leads to underestimation of stresses.

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Section: Case Study Of a Multilayered Microelectronic Packagementioning

confidence: 95%

“…Wen and Basaran [27]- [29], (2005) developed an analytical model for multilayered microelectronic structures based on the refined plate theory without the assumption of perfectly bounded interfaces. This model considers each layer as a beam-type plate with orthotropic material properties.…”

Section: Introductionmentioning

confidence: 99%

Analysis of Multilayered Microelectronic Packaging Under Thermal Gradient Loading

Basaran

Wen

2006

IEEE Trans. Comp. Packag. Technol.

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Section: Introductionmentioning

confidence: 99%

Analysis and Experimental Study of the Package Stresses in a QFN Plastic-Encapsulated Package

Luan

Blackie

2014

IEEE Trans. Compon., Packag. Manufact. Technol.

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Plastic-encapsulated packages are known to suffer package stress issues which often cause undesired shifts in the IC electrical parameters. Two types of package stress are analyzed and their contributions to the overall package stress in a Quad-Flat No-leads (QFN) Package are experimentally studied in this paper. The volumetric package stress generated by the mold compound is analyzed using the material properties of the bulk modulus and the volumetric coefficient of thermal expansion (vCTE). The in-plane package stress generated by the die and the die-attach material is analyzed using the structural analysis method with the introduction of an improved Suhir solution to evaluate the in-plane normal stress at the active area of the IC die. These theoretical analysis results are further experimentally studied with the functional measurements on a precision CMOS bandgap voltage reference in a QFN package. Using the combination of two different die-attach methods and two different die-coating conditions, the parametric variations in the bandgap voltage can be correlated with the different types of package stress. The actual test data presented in this paper are in good agreement with the theoretical analysis results.Index Terms-In-plane package stress, microelectronics packaging, package stress, structural analysis method, volumetric package stress.

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Effects of different air gaps of underfill encapsulant on multi-stack printed circuit board

Abas,

Mukhtar

2024

Microelectronics Reliability

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Analysis of multi-layered microelectronic packaging under uniformly distributed loading

Cited by 5 publications

References 27 publications

Analysis of Multilayered Microelectronic Packaging Under Thermal Gradient Loading

Analysis of Multilayered Microelectronic Packaging Under Thermal Gradient Loading

Analysis and Experimental Study of the Package Stresses in a QFN Plastic-Encapsulated Package

Effects of different air gaps of underfill encapsulant on multi-stack printed circuit board

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