Analysis of trap‐assisted tunnelling in asymmetrical underlap 3D‐cylindrical GAA‐TFET based on hetero‐spacer engineering for improved device reliability

Abstract

A unique design for an asymmetrical underlap (AU) cylindrical-gate-all-around (GAA)-n-tunnel field effect transistor (TFET) based on heterospacer engineering with trap-assisted tunnelling (TAT) for reliability concern is proposed and validated. Here, DC and analogue performances such as I ON , I OFF , SS, I ON /I OFF, C gs , and C gd have been investigated, while included TAT model and compared the examined device with AU GAA-TFET based on homo-spacer (HS) dielectric. On the basis of observation, the proposed device increases ON current as high as 2.1 × 10 −6 A/µm, which corresponds to 1024 times improvement in I ON /I OFF when compared with device based on HS. It also suppresses ambipolar behaviour with fast switching ON-OFF transition due to low leakage current (I OFF). These performances are mainly produced due to AU and low-k spacer dielectric which is replaced by high-k dielectric over source side spacer of the device, whereas drain side spacer is placed with high-k material along with increase in series resistance across drain-channel junction caused by drain underlap. Low-k spacer reduces the fringing field, and the depletion does not form at the source-gate edge, hence high source-channel tunnelling junction.

Suppress Short Channel Effects on Split Channel-Cylindrical GAA TFET Using Buried Oxide Layer

“…Similarly, Beohar et al studied the influence of a cylindrical GAA-TFET with a Germanium (Ge) source area on analog or radio-frequency (RF) properties. They developed the drain underlapping approach and used a high-constant dielectric material across the drain region, which minimized fringing field effects and decreased leakage current (Ioff) [11][12].Moreover, several TFET designs have been proposed to increase ON current, such as DG TFET [13], hetero structures [14], TFET of strained silicon [15] and so on. M.Joshi investigated the concept of channel splitting in GAA-TFET of 20nm channel length.…”

A Novel Germanium-Around-Source Gate-All-Around Tunnelling Field-Effect Transistor for Low-Power Applications

“…As mentioned, TFETs are based on BTBT conduction mechanism. This implies that the flow of drain current in n-channel-TFET occurs through tunnelling of charge carriers from the valence band of the source to the conduction band of the channel region [16]. Consequently, TFETs have a low I OFF and can achieve a sub-60 mV/decade SS.…”