Analyzing the Impact of Operating System Activity of Different Linux Distributions in a Distributed Environment

Giorgi, Roberto; Procaccini, Marco; Khalili, Farnam

doi:10.1109/empdp.2019.8671562

Cited by 5 publications

(5 citation statements)

References 48 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Such models are described by using C/C++ (two orange blocks in the top left part of Figure 1). ese models are then embedded in the COTSon simulator, which is managed in turn by the MYDSE tools in order to perform the design space exploration [16,17,19]. e latter is a collection of different tools, which provide a fast and convenient environment to simulate, debug, optimize, and analyze the functional and timing models of a specific architecture and to select the candidate design to be migrated to the HLS (top part of Figure 1).…”

Section: Methodsmentioning

confidence: 99%

“…cyber-physical system (CPS), i.e., including the possibility of running a real software performing Input/Output (I/O) and an off-the-shelf Linux distribution (or other operating systems). Since the performance of a CPS is affected also by the Operating System (OS) and libraries [17], it is important to model not only the memory hierarchy and cores but also all the devices of the system: this is possible in the COTSon framework.…”

Section: Simulatormentioning

confidence: 99%

“…In this subsection, we briefly summarize the features of the essential component of our toolchain-the COTSon-for the sake of a more self-contained illustration of our framework. More details can be found in [16,17,19,43].…”

Section: Simulatormentioning

confidence: 99%

“…e latter is what can be migrated in a straightforward way to HLS. Moreover, COTSon is a fullsystem simulator; hence, it permits to study the OS impact on the execution and choose the best OS configuration based on the application requirements [17]. e OS modelling is sometimes not available in other tools (reviewed in Section 2).…”

Section: Introductionmentioning

confidence: 99%

“…Additionally, thanks to our DSE toolset (MYDSE) [17,19], we facilitate the extraction of not only important metrics such as the execution time but also more detailed ones such as cache miss rates and bus traffics, which help investigate the appropriate system design. In order to illustrate our methodology, we start from a driving example related to design a simple two-way associative cache system.…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise—Designing a Computer Architecture via HLS)

Giorgi

Khalili

Procaccini

2019

International Journal of Reconfigurable Computing

Self Cite

View full text Add to dashboard Cite

Translating a system requirement into a low-level representation (e.g., register transfer level or RTL) is the typical goal of the design of FPGA-based systems. However, the Design Space Exploration (DSE) needed to identify the final architecture may be time consuming, even when using high-level synthesis (HLS) tools. In this article, we illustrate our hybrid methodology, which uses a frontend for HLS so that the DSE is performed more rapidly by using a higher level abstraction, but without losing accuracy, thanks to the HP-Labs COTSon simulation infrastructure in combination with our DSE tools (MYDSE tools). In particular, this proposed methodology proved useful to achieve an appropriate design of a whole system in a shorter time than trying to design everything directly in HLS. Our motivating problem was to deploy a novel execution model called data-flow threads (DF-Threads) running on yet-to-be-designed hardware. For that goal, directly using the HLS was too premature in the design cycle. Therefore, a key point of our methodology consists in defining the first prototype in our simulation framework and gradually migrating the design into the Xilinx HLS after validating the key performance metrics of our novel system in the simulator. To explain this workflow, we first use a simple driving example consisting in the modelling of a two-way associative cache. Then, we explain how we generalized this methodology and describe the types of results that we were able to analyze in the AXIOM project, which helped us reduce the development time from months/weeks to days/hours.

show abstract

Section: Methodsmentioning

confidence: 99%

Section: Simulatormentioning

confidence: 99%

Section: Simulatormentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations