Anisotropy of thermal expansion of GaAs on Si(001)

Abstract

We have measured the thermal expansion between 20 and 450 °C of epitaxially grown GaAs thin films on Si(001) as well as of the Si substrate by means of high-resolution x-ray scattering. Our results show that the thermal expansion of GaAs in the direction parallel to the film plane follows the thermal expansion of the silicon substrate and is therefore smaller than in bulk GaAs. Furthermore, the thermal expansion perpendicular to the film plane (parallel to the growth direction) exceeds the bulk GaAs value by the Poisson contribution as a result of the in-plane constraint. The thermal expansion coefficients for GaAs films on Si(001) substrates in the directions parallel and perpendicular to the film plane are αT∥(GaAs) =3.46×10−6/K and αT⊥(GaAs) =8.91×10−6/K, respectively.

Magnetocapacitance of La1−xCaxMnO3/SrTiO3: Nb junctions with different Ca contents

“…We note that the observed behavior may be due to different thermal expansion between LCMO and STO (a LCMO < a STO ) during sample cooling from the growth temperature whose effect is opposite to that of STO. [9][10][11] According to theory of film growth, the epitaxy mode of the thin film is a layer-by-layer growth mode. In a moderately mismatched system, the deposition initially follows a layer-by-layer mechanism, which leads to perfect wetting of the substrate.…”

Influence of Free Charge on the Lattice Parameters of GaN and Other Semiconductors

“…When cooling, if the substrate and layer have various thermal expansion, thermal strain can be created. Such situation was observed for GaAs layer on silicon substrate [22] and for some other semiconductors.…”

A Repeatable Epitaxial Lift‐Off Process from a Single GaAs Substrate for Low‐Cost and High‐Efficiency III‐V Solar Cells

“…AsH 3 , PH 3 , TMGa, TMIn, and TMAl were used as precursors. SiH 4 and DMZn were employed as the doping sources. The multilayer epitaxial stacks for each of the device layers were composed of an n-type contact layer (0.5 µm thick Si-doped GaAs), an n-type back surface fi eld layer (0.05 µm thick Si-doped, 3 × 10 18 cm −3 , Ga 0.5 In 0.5 P), an n-type base layer (3.5 µm thick Si-doped, 8 × 10 16 cm −3 , GaAs), a p-type emitter layer (0.5 µm thick Zn-doped, 1 × 10 18 cm −3 , GaAs), a p-type window layer (0.03 µm thick Zn-doped, 1 × 10 18 cm −3 , Ga 0.5 In 0.5 P layer), and a p-type contact layer (0.3 µm thick Zn-doped GaAs).…”