Anomalous bias-stress-induced unstable phenomena of hydrogenated amorphous silicon thin-film transistors

Abstract

Thin-film transistors (TFTs) with different silicon nitride (SiNx) gate compositions and various hydrogen concentrations in their amorphous silicon films (a-Si:H) have been stressed with positive and negative biases to realize the instability mechanisms. For both stress polarities, it is found that the threshold voltage shifts significantly increase due to the trap sites in the SiNx gate. As the effects of the trapped charges in the SiNx films are reduced, the anomalous threshold voltage shifts under negative stress voltage are observed. The creation of the states near the conduction band in the a-Si:H films can be enhanced according to the defect pool concept and stimulated by the hydrogen contents in the a-Si:H films, which can be confirmed by the subthreshold swing change. Therefore, the negative threshold voltage shifts caused by the hole trapping in the SiNx gate are positively compensated by the created states, reflecting the turnaround behaviors for the threshold voltage shifts. As for the positive stress, the state creation in the a-Si:H films can be suppressed via the defect pool mechanism and thus the threshold voltage shifts are dominantly affected by the electron trapping in the SiNx gates.

Zapping thin film transistors

“…It should be noted that after the first TLM stress the ''turnaround phenomenon'' of the threshold voltage shift is noticed. This phenomena for the low negative gate bias is already known in the literature [10] and it appears when the negative threshold voltage shift caused by the hole trapping in the SiN gate dielectric are positively compensated by the states created near the conduction band in the a-Si film. This process of state creation should be distinguished from the creation of states under high electric field.…”

Nano-second timescale drain voltage induced electrical instabilities in hydrogenated amorphous silicon thin film transistors

“…It is also interesting to note that this V T recovery behavior is different from what has been reported for high negative gate bias induced instabilities, where the V T recovery in the device takes place on the account of hole trapping in the dielectric layer. 34) To further explore the instability behavior, C-V and C-V hysteresis measurements are performed at a frequency 10 and 100 kHz at different stress levels and the results are presented in Fig. 5.…”

Effects of Si3N4passivation on the dc and RF characteristics of metamorphic high-electron-mobility transistors depending on the gate-recess structures

“…Silicon nitride (Si 3 N 4 ) is one of the most dominant passivation materials for the GaAs monolithic microwave integrated circuit fabrications because it can effectively protect the devices from the external damage sources. However, the variations of dc and RF characteristics induced by the Si 3 N 4 passivation have been observed in various types of field effect transistors [9][10][11]. Although many arguments have been made on this phenomenon, the effects of the Si 3 N 4 passivation on the variations of device characteristics are most likely related to the surface states induced by many possible causes, such as ion bombardment during the film deposition [12], high stress states [13] and Si-NH bonding states [14] for dc characteristics, and to the increase of parasitic capacitance for RF characteristics [15].…”