No abstract

A buried injector is proposed as a source of electrons for substrate hot electron injection. To enhance the compatibility with VLSI processing, the buried injector is formed by the local overlap of the n-well and p-well of a retrograde twin-well CMOS process. The injector is activated by means of punchthrough. This mechanism allows the realization of a selective injector without increasing the latchup susceptibility. The p-well profile controls the punchthrough voltage. The high injection probability and efficient electron supply mechanism lead to oxide current densities up to 1.0 A. Em-'. Programming times of 10 ps have been measured on nonoptimized cells. The realization of a structure for 5-V-only digital and analog applications is viable. A model of the structure for implementation in a circuit simulator, such as SPICE, is presented.

Electrical breakdown induced by systematic electrostatic discharge (ESD) stress of thin-film transistors used as switches in active matrix addresses liquid crystal displays has been studied using electrical measurements, electrical simulations, electrothermal simulations, and postbreakdown observations. Breakdown due to very short pulses (up to 1 s) shows a clear dependence on the channel length. A hypothesis that electrical breakdown in the case of short channel TFTs is due to the punch-through is built on this dependence and is proved by means of electrical simulations. Further, the presence of avalanche breakdown in amorphous silicon thin-film transistors is simulated and confirmed. It is finally assumed that the breakdown is a thermal process. Three-dimensional (3-D) electrothermal simulations are performed in the static and transient regime, confirming the location of the breakdown spot within the TFT from the electrical simulations and postbreakdown observations.

The objective of this letter is to give an estimation of the impact of an electrostatic discharge (ESD) stress on the density of states (DOS) within the energy gap of hydrogenated amorphous silicon (a-Si:H) thin-film transistors. ESD stresses were applied by means of a transmission line model tester. The DOS in the a-Si:H was determined by Suzuki’s algorithm using field-effect conductance measurements. A comparison of stressed and unstressed devices shows that there is a threshold ESD stress voltage, below which there is no damage. Above the threshold stress level, first an increase of the deep gap states is found and when stress is increased further, also in the tail states.

Abstruct-The electrical characteristics of modern VLSI and ULSI device structures may be significantly altered by self-heating effects. The device modeling of such structures demands the simultaneous simulation of both the electrical and the thermal device behavior and their mutual interaction. Although, at present, a large number of multi-dimensional device simulators are available, most of them are based on physical models which do not properly allow for heat transport and other nonisothermal effects.In this paper, we demonstrate that the numerical process/device simulator TRENDY provides a solid base for nonisothermal device simulation, as a physically rigorous device model of carrier and heat transport has been incorporated in the TRENDY program. With respect to the boundary conditions, it is shown that inclusion of an artificial boundary material relaxes some fundamental physical inconsistencies resulting from the assumption of ideal ohmic contact boundaries.The program TRENDY has been used for studying several nonisothermal problems in microelectronics. As an example, we consider an ultra-thin SO1 MOSFET showing that the negative slopes in the V d s -l d s characteristics are caused by the temperature-dependence of the electron saturation velocity.