Emerging wireless applications such as 5G cellular, large intelligent surfaces (LIS), and holographic massive MIMO require antenna array processing at mm-wave frequencies with large numbers of independent digital transceivers. This paper summarizes the authors' recent progress on the design and testing of 28 GHz and 60 GHz fully-digital array processing platforms based on wideband reconfigurable FPGA-based software-defined radios (SDRs). The digital baseband and microwave interfacing aspects of the SDRs are implemented on single-chip RF systemon-chip (RF-SoC) processors from Xilinx. Two versions of the RF-SoC technology (ZCU-111 and ZCU-1275) were used to implement fully-digital real-time array processors at 28 GHz (realizing 4 parallel beams with 0.8 GHz bandwidth per beam) and 60 GHz (realizing 4 parallel beams with 1.8 GHz bandwidth per beam). Dielectric lenslet arrays fed by a digital phased-array feed (PAF) located on the focal plane are proposed for further increasing antenna array gain.