Application Mapping and Scheduling for Network-on-Chip-Based Multiprocessor System-on-Chip With Fine-Grain Communication Optimization

Abstract

Network-on-chip (NoC) is promising for the communication paradigm of the next-generation multiprocessor system-on-chip (MPSoC). As communication has become an integral part of on-chip computing, and even the performance bottleneck, researchers are paying much attention to its implementation and optimization. Traditional techniques that model communication inaccurately will lead to unexpected runtime performance, which is on average 90.8% worse than the predicted results based on observation, and are not suitable for the deep optimization of communication-intensive scenarios. In this paper, techniques are presented for the NoC-based MPSoCs that integrate optimization on interprocessor communications with the objective of minimizing the schedule length. A fine-grained integer-linear programming (ILP) model is proposed to properly address the communication latency with a network contention, which generates runtime scheduling with trivial performance difference from the predictions. We further propose a heuristic algorithm, unified priority-based scheduling (UPS), to effectively solve the contention problem in polynomial time by assigning priorities to messages. Evaluation results show that the solutions obtained by the ILP model outperform the state-of-the-art techniques by 31.1%, and UPS improves application performance by 34.7% and 44.4% compared with acquainted first-in-first-out (FIFO)-based and random-based methods. In addition, UPS achieves averagely 8.3% approximated results with the optimal solutions generated by ILP. A case study on H.264 high-definition television (HDTV) decoder and the digital signal processor (DSP) filter benchmarks achieves significant improvement on the performance and the results prediction accuracy, as well as the prominent reduction in the number of network contention and energy consumption.

Fine-Grained Communication-Aware Task Scheduling Approach for Acyclic and Cyclic Applications on MPSoCs

“…As fine-grained models incur large amount of communication overhead, fine-grained communication optimization techniques have been developed. For Network-on-Chip (NoC) based MPSoC, the techniques [16], [17] consider the optimizations of data packet transmission and routing mechanisms. For bus-based MPSoC, message aggregation and communication pipeline have been proposed to reduce inter-thread communication overhead [6].…”

Energy-aware Task Scheduling Strategies for Multi-core Embeddded Systems

“…The literature [21] compared the genetic algorithm and the shuffled frog leaping algorithm, and thought that the particle swarm optimization algorithm has a better optimization effect. In addition, the literature [22], [23], [24] proposes new ideas about minimizing energy consumption in multi-core. The literature [22]comprehensively considers the problem of task ordering and voltage scaling, and proposes a multiprocessor scheduling algorithm based on energy gradient.…”

“…The literature [22]comprehensively considers the problem of task ordering and voltage scaling, and proposes a multiprocessor scheduling algorithm based on energy gradient. In the literature [23], a fine-grained integer linear programming (ILP) model was established for inter-processor communication-intensive scenarios, and a unified prioritybased scheduling (UPS) algorithm was brought forward. The literature [24] takes into account the memory allocation problem of data, and proposes an energy optimization algorithm that considers data allocation.…”

SAFEPOWER project: Architecture for safe and power-efficient mixed-criticality systems

“…Due to the dependence of energy consumption on the mapping of the application's processes onto the NoC, several algorithms have been developed for static mapping of processes such as [71]- [74] and for dynamic mapping such as [75], [76] including that with specific consideration for mixedcritical systems [74].…”