Proceedings of the 2002 ACM/SIGDA Tenth International Symposium on Field-Programmable Gate Arrays - FPGA '02 2002
DOI: 10.1145/503062.503063
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Application of FPGA technology to accelerate the finite-difference time-domain (FDTD) method

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Cited by 7 publications
(6 citation statements)
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“…Among different approaches, such as using clusters [22] or field programmable gate arrays (FPGA) [23], using graphics processing unit (GPU) is more efficient, and cheaper in reducing runtimes. In spite of large efforts on GPU parallel programming for ordinary FDTD [24][25][26][27][28][29][30][31], GPU parallel programming for SF-FDTD has not been reported yet, to the best of our knowledge.…”
Section: Introductionmentioning
confidence: 99%
“…Among different approaches, such as using clusters [22] or field programmable gate arrays (FPGA) [23], using graphics processing unit (GPU) is more efficient, and cheaper in reducing runtimes. In spite of large efforts on GPU parallel programming for ordinary FDTD [24][25][26][27][28][29][30][31], GPU parallel programming for SF-FDTD has not been reported yet, to the best of our knowledge.…”
Section: Introductionmentioning
confidence: 99%
“…It can not only solve the large memory requirements, but also greatly reduce the computing time [2].Since 1991, E, K. Miller proposed parallel FDTD computing which based on the idea of domain decomposition [3], parallel FDTD computing have witnessed a rapid development at home and abroad. To sum up, there are three main parallel computing methods at present--personal computer (PC) cluster [4], field programmable gate array [5] (FPGA) and GPu. It has done a great deal of researches on PC cluster, the technology is very mature, but it is expensive and bulky.…”
Section: Introductionmentioning
confidence: 99%
“…An alternative solution is the hardware implementation of the Finite Difference (FD) representation of the thermal model. In fact, different hardware implementations of FD solutions in the electromagnetics domain can be found in the literature, Durbano et al (2004); Placidi et al (2002);Schneider et al (2002). In previous works, Pardo et al (2009;, we have presented an FPGA implementation of a FD Heat Equation solver which speeds the computation up by a factor of 10 compared to the purely software solution.…”
mentioning
confidence: 99%