Application of PODEM Algorithm for Fault Detection and Location in FinFet based Combinational VLSI Circuits

Abstract

FinFet transistors are used in major semiconductor organizations and a significant role is played by it in developing the silicon industries. Due to few embedded memories and other circuit issues the transistors have specific faults in manufacturing, designing of the circuit etc. This paper presents an advanced test algorithm to diagnose those faults. The circuit with different gates is designed to identify the places having faults. In addition, different algorithms such as PODEM (Path Oriented Decision Making algorithms) are used to find the fault detection and location. The Furthermore, more complicated circuits are analyzed for fault detection with different approach. In this research work Combinational Circuits are designed using 20nm/32nm technology nodes in LT Spice environment and PODEM Algorithm is implemented which is developed in MATLAB, to detect and identify fault location and sensitive test vector to detect fault in the circuit and results are presented..

RETRACTED: MATLAB-Simulink based framework for test generation of analog driven digital blocks

“…The aforesaid difficulties have been solved in two folds in this work. Firstly, the MATLAB/Simulink platform which is readily available in Universities is explored to implement an a well-known ATPG algorithm, namely, PODEM [17] followed by application of generated test pattern to the gate-level netlists of combinational circuits built in Simulink to create a testing model [19]. Secondly, the paper proposes a new methodology to test the digital block embedded in AMS circuits with minimal overheads by exploiting the linear analog block itself through a process known as "analog backtrace" [15], [16].…”

“… In this paper, a MATLAB based ATPG algorithm, namely, PODEM algorithm [17] has been implemented to test any combinational circuit.…”