Approximate caches for packet classification

Chang, Francis; Feng, Wu-chang; Li, Kang

doi:10.1109/infcom.2004.1354643

Cited by 113 publications

(82 citation statements)

References 21 publications

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“…However, this design makes inefficient use of storage and is unlikely to perform competitively with the BGP . The concept of maintaining and swapping two temporally-separated Bloom filters has been previously employed in software for filtering dynamic data [59,60,61]. BGP is the first application of such a scheme to memory access granularity prediction in hardware and is unique in its implementation and default prediction inverting algorithm.…”

Section: Other Dynamic Bloom-filter Mechanismsmentioning

confidence: 99%

A locality-aware memory hierarchy for energy-efficient GPU architectures

Rhu

Sullivan

Leng

et al. 2013

Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture

103

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As GPU's compute capabilities grow, their memory hierarchy increasingly becomes a bottleneck. Current GPU memory hierarchies use coarse-grained memory accesses to exploit spatial locality, maximize peak bandwidth, simplify control, and reduce cache meta-data storage. These coarse-grained memory accesses, however, are a poor match for emerging GPU applications with irregular control flow and memory access patterns. Meanwhile, the massive multi-threading of GPUs and the simplicity of their cache hierarchies make CPU-specific memory system enhancements ineffective for improving the performance of irregular GPU applications. We design and evaluate a locality-aware memory hierarchy for throughput processors, such as GPUs. Our proposed design retains the advantages of coarse-grained accesses for spatially and temporally local programs while permitting selective fine-grained access to memory. By adaptively adjusting the access granularity, memory bandwidth and energy are reduced for data with low spatial/temporal locality without wasting control overheads or prefetching potential for data with high spatial locality. As such, our locality-aware memory hierarchy improves GPU performance, energy-efficiency, and memory throughput for a large range of applications.

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Section: Other Dynamic Bloom-filter Mechanismsmentioning

confidence: 99%

A locality-aware memory hierarchy for energy-efficient GPU architectures

Rhu

Sullivan

Leng

et al. 2013

Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture

103

View full text Add to dashboard Cite

show abstract

“…But we need to address the problems of Bloom filter mentioned in Section III-B. Our idea is to design a Bloom filter array (BFA) with the following functionalities, not available in the original Bloom filter [9] and [16]: 1) Removal functionality: We implement insertion and removal operations synergistically by using insertionremoval pair vectors. The trick is that, rather than removing f (p ) from the insertion vector, we create a removal vector and insert f (p ) into the removal vector.…”

Section: Bloom Filter Arraymentioning

confidence: 99%

“…end if 11) end function 12) function ProcOutbound(p ) 13) for j ← I to (I − w + 1)%w 14) if BloomFilterSearch(RV j , f (p )) returns true then 15) break 16) if BloomFilterSearch(IV j , f (p )) returns true then 17) …”

Section: Round Robin Sliding Windowunclassified

An efficient data structure for network anomaly detection

Fan

et al. 2008

Security Comm Networks

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Abstract-Despite the rapid advance in networking technologies, detection of network anomalies at high-speed switches/routers is still far from maturity. To push the frontier, two major technologies need to be addressed. The first one is efficient feature-extraction algorithms/hardware that can match a line rate in the order of Gb/s; the second one is fast and effective anomaly detection schemes. In this paper, we focus on design of efficient data structure and algorithms for feature extraction. Specifically, we propose a novel data structure that extracts socalled two-directional (2D) matching features, which are shown to be effective indicators of network anomalies. Our key idea is to use a Bloom filter array to trade off a small amount of accuracy in feature extraction, for much less space and time complexity, so that our data structure can catch up with a line rate in the order of Gb/s. Different from the existing work, our data structure has the following properties: 1) dynamic Bloom filter, 2) combination of a sliding window with Bloom filter, and 3) using an insertion-removal pair to enhance Bloom filter with a removal operation. Our analysis and simulation demonstrate that the proposed data structure has a better space/time tradeoff than conventional algorithms. For example, for a fixed time complexity, the conventional algorithm (i.e., hash table [1]-[8]) requires a memory of 1.01G bits while our data structure requires a memory of only 62.9M bits, at the cost of losing 1% accuracy in feature extraction.

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“…Among them, hash-based schemes have been favored due to power efficiency and balanced memory access againt the others. As a hash-based scheme, a Bloom filter (BF) has been widely documented in literature on networking [1][2][3][4][5][6]. A BF is essentially a generalized hash mechanism on a key set with k hash functions for approximate membership testing.…”

Section: Introductionmentioning

confidence: 99%

A Power and Throughput-Efficient Packet Classifier with n Bloom Filters

Yu¹,

Mahapatra

2011

IEEE Trans. Comput.

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Abstract-Packet classification is a critical data path in a highspeed router. Due to memory efficiency and fast lookup, Bloom filters (BFs) have been widely used for packet classification in a high-speed router. However, in a parallel packet classifier (PPC) of n parallel BFs, using all n BFs for a lookup is not throughput efficient in a high speed router. In this paper, we propose a multi-tiered packet classifier (MPC) for high throughput with the same memory size as a PPC. While a PPC of n BFs needs Θ(n) BF access complexity for a lookup, our MPC is geared to have the complexity which is probabilistically far less than Θ(n). Furthermore, by preprocessing a group of lookups in one cycle, each lookup is assigned to its associated BF at best effort, so that a higher throughput in an MPC is obtained. In simulation for flow identification with NLANR traces, we observed that, at most, 2.0 times more throughput was recorded than a PPC .

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Approximate caches for packet classification

Cited by 113 publications

References 21 publications

A locality-aware memory hierarchy for energy-efficient GPU architectures

A locality-aware memory hierarchy for energy-efficient GPU architectures

An efficient data structure for network anomaly detection

A Power and Throughput-Efficient Packet Classifier with n Bloom Filters

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