Approximate computing: Challenges and opportunities

Agrawal, Ankur; Choi, Jungwook; Gopalakrishnan, Kailash; Gupta, Suyog; Nair, Ravi; Oh, Jinwook; Prener, Daniel A.; Shukla, Sunil; Srinivasan, Vijayalakshmi; Sura, Zehra

doi:10.1109/icrc.2016.7738674

Cited by 74 publications

(43 citation statements)

References 19 publications

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“…As the data processing in error-tolerant applications becomes more and more power demanding, approximate computing surfaced as the solution to obtain significant gains in computational throughput and to achieve more power-efficient processing [1]. Approximate computing assumes small approximations in computing while maintaining an acceptable quality of results [1]- [5].…”

Section: Introductionmentioning

confidence: 99%

On the Design of Logarithmic Multiplier Using Radix-4 Booth Encoding

Pilipović

Bulić

2020

IEEE Access

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This paper proposes an energy-efficient approximate multiplier which combines radix-4 Booth encoding and logarithmic product approximation. Additionally, a datapath pruning technique is proposed and studied to reduce the hardware complexity of the multiplier. Various experiments were conducted to evaluate the multiplier's error performance and efficiency in terms of energy and area utilization. The reported results are based on simulations using TSMC-180nm. Also, the applicability of the proposed multiplier is examined in image sharpening and convolutional neural networks. The applicability assessment shows that the proposed multiplier can replace an exact multiplier and deliver up to a 75% reduction in energy consumption and up to a 50% reduction in area utilization. Comparative analysis with the state-of-the-art multipliers indicates the potential of the proposed approach as a novel design strategy for approximate multipliers. When compared to the state-of-the-art approximate non-logarithmic multipliers, the proposed multiplier offers smaller energy consumption with the same level of applicability in image processing and classification applications. On the other hand, some state-of-the-art approximate logarithmic multipliers exhibit lower energy consumption than the proposed multiplier but deliver significant performance degradation for the selected application cases. INDEX TERMS Approximate computing, arithmetic circuit design, booth encoding, logarithmic multipliers, multipliers, power-efficient processing, truncated multipliers.

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Section: Introductionmentioning

confidence: 99%

On the Design of Logarithmic Multiplier Using Radix-4 Booth Encoding

Pilipović

Bulić

2020

IEEE Access

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“…Hence, despite its error tolerance, error metrics such as error distance and error rate are important. Many studies have been conducted on approximate computing and the trade-off between power and accuracy has been investigated [1,2].…”

Section: Introductionmentioning

confidence: 99%

Novel Stochastic Computing for Energy-Efficient Image Processors

Joe

Kim

2019

Electronics

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Stochastic computing, which is based on probability, involves a trade-off between accuracy and power and is a promising solution for energy-efficiency in error-tolerance designs. In this paper, adder and multiplier circuits based on the proposed stochastic computing architecture are studied and analyzed. First, we propose an efficient yet simple stochastic computation technique for multipliers and adders by exchanging the wires used for their operation. The results demonstrate that the proposed design reduces the relative error in computation compared with the conventional designs and has smaller area compared to conventional designs. Then, a new energy-efficient and high-performance stochastic adder with acceptable error metrics is investigated. The proposed multiplier shows better error metrics than other existing stochastic multipliers, and significantly improves area utilization and power consumption compared to the exact binary multiplier. Finally, we apply the proposed stochastic architecture to an edge detection algorithm and achieve a significant reduction in area utilization (64%) and power consumption (96%). It is therefore demonstrated that the proposed stochastic architecture is suitable for energy-efficient hardware designs.

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“…skipping computations, voltage overscaling, loop perforation, and quality-scalable or approximate circuits [1], [2]). Moreover, there are some studies that combine multiple approximation techniques [3].…”

Section: Introductionmentioning

confidence: 99%

Tunable Floating-Point for Artificial Neural Networks

Franceschi

Nannarelli

Valle

2018

2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS)

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Approximate computing has emerged as a promising approach to energy-efficient design of digital systems in many domains such as digital signal processing, robotics, and machine learning. Numerous studies report that employing different data formats in Deep Neural Networks (DNNs), the dominant Machine Learning approach, could allow substantial improvements in power efficiency considering an acceptable quality for results. In this work, the application of Tunable Floating-Point (TFP) precision to DNN is presented. In TFP different precisions for different operations can be set by selecting a specific number of bits for significand and exponent in the floating-point representation. Flexibility in tuning the precision of given layers of the neural network may result in a more power efficient computation.

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Approximate computing: Challenges and opportunities

Cited by 74 publications

References 19 publications

On the Design of Logarithmic Multiplier Using Radix-4 Booth Encoding

On the Design of Logarithmic Multiplier Using Radix-4 Booth Encoding

Novel Stochastic Computing for Energy-Efficient Image Processors

Tunable Floating-Point for Artificial Neural Networks

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