Proceedings of the 2016 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE) 2016
DOI: 10.3850/9783981537079_0416
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Approximation through Logic Isolation for the Design of Quality Configurable Circuits

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Cited by 5 publications
(1 citation statement)
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“…In DNNs, approximations were introduced at levels of the data type quanti- zation, microarchitecture (e.g. neurons insignificantly contributing to the quality of outputs can be removed), training algorithm (an iterative process which can be stopped when good enough results are obtained), the multiply-accumulatetransform circuits (where the design of approximate multipliers and adders for DNN applications represents an independent topic [15], [16]), and memory cells and architecture (where, e.g., less significant bits can be stored in energy efficient, but less reliable memory cells [17]). An ultralow power deep learning ASIC for IoT was implemented on a single chip, capable of performing 374 GOPS/W and consuming less than 300 µW.…”
Section: Approximate Circuits For Image and Video Processingmentioning
confidence: 99%
“…In DNNs, approximations were introduced at levels of the data type quanti- zation, microarchitecture (e.g. neurons insignificantly contributing to the quality of outputs can be removed), training algorithm (an iterative process which can be stopped when good enough results are obtained), the multiply-accumulatetransform circuits (where the design of approximate multipliers and adders for DNN applications represents an independent topic [15], [16]), and memory cells and architecture (where, e.g., less significant bits can be stored in energy efficient, but less reliable memory cells [17]). An ultralow power deep learning ASIC for IoT was implemented on a single chip, capable of performing 374 GOPS/W and consuming less than 300 µW.…”
Section: Approximate Circuits For Image and Video Processingmentioning
confidence: 99%