ARC and gap fill material with high etch rate for advanced dual damascene process

Shinjo

Horiguchi

2007

jjap

Self Cite

In the dual damascene (DD) process using the via-first trench-last approach, a planarizing thermally cured material is used to minimize thickness variation across the vias. The coating planarization is followed by photoresist application and lithography on vias. The major problem with this process is the large thickness bias observed as via pattern pitch and density change across the wafer. The thickness bias between the open field and dense via arrays is not acceptable for advanced lithography and leads to narrow process windows and problems during the subsequent trench etch steps. In this study, UV-cured gap fill materials are proposed as planarizing layers under a photoresist. UV-cured gap fill materials show good planarization, via fill properties (no voids), etch selectivity, minimal outgassing during curing, excellent resistance to solvents and photoresist intermixing when compared with thermally cured films. This novel method using UV curing to reduce thickness bias in gap fill materials is one of the most promising processes ready to be incorporated into the mass production of patterning metal trenches by the 32 -45 nm via-first DD process.

Section: Sublimation Reduction and Process Timementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Ultraviolet Cross-Link Gap Fill Materials and Planarization Applications for Patterning Metal Trenches in 32–45 nm Via First Dual Damascene Process

Shinjo

Horiguchi

2007

jjap

Self Cite

“…At the present stage of lithography, the output of an ArF excimer laser at 193 nm is used for the 45 -90 nm patterning and metal interconnects by the dual damascene (DD) process. [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16] The DD process etches a dielectric layer to form a pattern of a metal conductor wire, and then fills the pattern with metal. The DD process can be classified into two principal types, namely, trench-first DD and via-first DD.…”

Section: Introductionmentioning

confidence: 99%

Resist Poisoning Studies of Gap Fill Materials for Patterning Metal Trenches in Via-First Dual Damascene Process

2008

jjap

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The via-first dual damascene process is the current manufacturing technology for copper/low-k interconnect fabrication. In the conventional via-first dual damascene process, metal trench patterning lithography is applied after filling the vias with sacrificial organic materials under the resist, such as gap fill materials and bottom antireflective coating. Resist poisoning has become a serious problem for the 65 nm technology node and beyond owing to the use of porous low-k dielectric materials. This study describes the newest method of evaluating resist poisoning. The dependence of film thickness on resist poisoning was observed, and the effects of the gap fill materials with different polymers were also clarified. One gap fill material was found to have an excellent resist poisoning blocking property as determined from the bias of trench patterning size between the center and edge areas. In addition, to evaluate the resist poisoning in lithography, a chemical approach using the developed gap fill materials can potentially allow the skipping of the additional thermal annealing process and achieve high throughput wafer processing by only coating the gap fill material on the substrates that generate resist poisoning. Continuing the via-first dual damascene process using porous low-k dielectric materials in an advanced lithography will be valuable in future studies based on this evaluation method, compared with the trench-first dual damascene process owing to the higher cost of the latter.

“…To meet the increasing demand of high degrees of integration in semiconductor devices, gap fill materials with high planarization and fast etch rates are required by the microelectronics industry in the 130 nm node and below for dual damascene technologies. [1][2][3][4][5][6][7][8][9][10][11] In the via-first dual damascene process of ArF photolithography, gap fill materials are used as sacrificial materials under a photoresist or bottom antireflective coating (BARC). The gap fill materials described herein are fillers or planarizing materials designed to planarize the irregularities of the substrate.…”

Section: Introductionmentioning

confidence: 99%

Gap Fill Materials Using Cyclodextrin Derivatives in ArF Lithography

Shinjo

Sakaida

et al. 2007

jjap

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We determine the geometry of supersymmetric heterotic string backgrounds for which all parallel spinors with respect to the connection∇ with torsion H, the NS⊗NS three-form field strength, are Killing. We find that there are two classes of such backgrounds, the null and the timelike. The Killing spinors of the null backgrounds have stability subgroups K R 8 in Spin(9, 1), for K = Spin(7), SU (4), Sp(2), SU (2) × SU (2) and {1}, and the Killing spinors of the timelike backgrounds have stability subgroups G 2 , SU (3), SU (2) and {1}. The former admit a single null∇-parallel vector field while the latter admit a timelike and two, three, five and nine spacelike∇-parallel vector fields, respectively. The spacetime of the null backgrounds is a Lorentzian two-parameter family of Riemannian manifolds B with skew-symmetric torsion. If the rotation of the null vector field vanishes, the holonomy of the connection with torsion of B is contained in K. The spacetime of time-like backgrounds is a principal bundle P with fibre a Lorentzian Lie group and base space a suitable Riemannian manifold with skew-symmetric torsion. The principal bundle is equipped with a connection λ which determines the non-horizontal part of the spacetime metric and of H. The curvature of λ takes values in an appropriate Lie algebra constructed from that of K. In addition dH has only horizontal components and contains the Pontrjagin class of P . We have computed in all cases the Killing spinor bilinears, expressed the fluxes in terms of the geometry and determine the field equations that are implied by the Killing spinor equations.