Area Efficient Dual-Fed CMOS Distributed Power Amplifier

Pino, J. del; Khemchandani, Sunil L.; Mateos-Angulo, Sergio; Mayor-Duarte, Daniel; San-Miguel-Montesdeoca, Mario

doi:10.3390/electronics7080139

Cited by 3 publications

(3 citation statements)

References 14 publications

(22 reference statements)

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“…Traditional distributed amplifiers can also be called uniformly distributed amplifiers. The size of transistors in each stage of this type of amplifier and the length of the gate and drain transmission lines in each stage are the same [15], as shown in Fig. 1.…”

Section: Theoretical Basis Of Distributed Circuitsmentioning

confidence: 99%

Design of a 0.8-2.2GHz ultra-wideband RF high power amplifier

Nan

Liu

Cong

et al. 2023

IEICE Electron. Express

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Based on the self-developed standard process RF-LDMOS device, a new ultra-wideband RF power amplifier is designed in this letter. The amplifier removes the absorbing resistor and capacitor series structure at the end of the drain. The stability of the circuit is enhanced by the pre-matching circuit. Considering the small impedance value of the RF high-power device, it is difficult to achieve broadband matching. The novel tapering drain transmission has been developed which overcomes the distributed amplifier's limitations of low power and efficiency. Ultrawideband RF amplifier has excellent output power and efficiency. The measurement results show that from 0.8-2.2GHz, under the condition of 28V power supply, the saturated output power is 43dBm (20W), the power gain is 10dB, the drain efficiency is about 30%-50%; The peak-to-average ratio is 8dB, and the ACPR is less than -41dBc when the linear output is 5W, proving the effectiveness of the new tapered drain structure to achieve broadband.

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Section: Theoretical Basis Of Distributed Circuitsmentioning

confidence: 99%

Design of a 0.8-2.2GHz ultra-wideband RF high power amplifier

Nan

Liu

Cong

et al. 2023

IEICE Electron. Express

View full text Add to dashboard Cite

show abstract

“…Several approaches can be found in the literature reporting integrated LNA design methodologies, with different strategies regarding the parameters analyzed in the design process [7][8][9][10][11][12][13][14][15][16]. An even larger quantity of different configurations has been proposed for specific applications [17][18][19][20][21][22][23][24][25][26].…”

Section: Introductionmentioning

confidence: 99%

A Novel Design and Optimization Approach for Low Noise Amplifiers (LNA) Based on MOST Scattering Parameters and the gm/ID Ratio

et al. 2020

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This work presents a new design methodology for radio frequency (RF) integrated circuits based on a unified analysis of the scattering parameters of the circuit and the gm/ID ratio of the involved transistors. Since the scattering parameters of the circuits are parameterized by means of the physical characteristics of transistors, designers can optimize transistor size and biasing to comply with the circuit specifications given in terms of S-parameters. A complete design of a cascode low noise amplifier (LNA) in MOS 65 nm technology is taken as a case study in order to validate the approach. In addition, this methodology permits the identification of the best trade-off between the minimum noise figure and the maximum gain for the LNA in a very simple way.

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“…In radio frequency integrated circuits, the design of wideband amplifiers has been intensively discussed over the past few decades [1]. The most widely used wideband amplifier architecture is the distributed amplifier, which requires high power consumption and a large area due to the considerable number of stages and the extensive use of inductors [2][3][4].…”

Section: Introductionmentioning

confidence: 99%

A Compact Size Wideband RF-VGA Based on Second Generation Controlled Current Conveyors

et al. 2020

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This paper presents a methodology to design a wideband radio frequency variable gain amplifier (RF-VGA) in a low-cost SiGe BiCMOS 0.35 μm process. The circuit uses two Class A amplifiers based on second-generation controlled current conveyors (CCCII). The main feature of this circuit is the wideband input match along with a reduced NF (5.5–9.6 dB) and, to the authors’ knowledge, the lowest die footprint reported (62 × 44 μm2 area). The implementation of the RF-VGA based on CCCII allows a wideband input match without the need of passive elements. Due to the nature of the circuit, when the gain is increased, the power consumption is reduced. The architecture is suitable for designing wideband, low-power, and low-noise amplifiers. The proposed design achieves a tunable gain of 6.7–18 dB and a power consumption of 1.7 mA with a ±1.5 V DC supply. At maximum gain, the proposed RF-VGA covers from DC up to 1 GHz and can find application in software design radios (SDRs), the low frequency medical implant communication system (MICS) or industrial, scientific, and medical (ISM) bands.

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Area Efficient Dual-Fed CMOS Distributed Power Amplifier

Cited by 3 publications

References 14 publications

Design of a 0.8-2.2GHz ultra-wideband RF high power amplifier

Design of a 0.8-2.2GHz ultra-wideband RF high power amplifier

A Novel Design and Optimization Approach for Low Noise Amplifiers (LNA) Based on MOST Scattering Parameters and the gm/ID Ratio

A Compact Size Wideband RF-VGA Based on Second Generation Controlled Current Conveyors

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