Area optimization for leakage reduction and thermal stability in nanometer scale technologies

Abstract

-Traditionally, minimum possible area of a VLSI layout is considered the best for delay and power minimization due to decreased interconnect capacitance. This paper shows however that the use of minimum area does not result in the minimum power and/or delay in nanometer scale technologies due to thermal effects, and in some cases, may result in thermal runaway. A methodology using area as a design parameter to reduce the leakage power, and prevent thermal runaway is presented. A 16-bit adder example in a 70nm technology shows a total power savings of 17% with 15% increase in area, and no increase in delay. The power savings using this technique are expected to increase in future technologies.

Improvement of Thermal Environment by Thermoelectric Coolers and Numerical Optimization of Thermal Performance

“…As the feature size in nanometer-scale ICs continues to shrink, the increased power caused by the subthreshold current will contribute to higher temperature, which in turn further increases the circuit power and produces an uncontrolled positive feedback in the end. This process is called thermal runaway which will lead to a destructive thermal environment if not controlled [28]. A proper thermal solution to maintain temperature within its operating limits is significant for the system reliability of high-power processors.…”

“…Reducing operation temperature for a proper thermal environment is indispensable to the system performance. Considering the system power and thermal resistance in the dissipated heat path, the junction temperature thermal profile model of die is given by [28] R j a c sys dT j dt + T j = R j a P(T j ) + T a (9) where c sys is the system thermal capacitance, R j a is the thermal resistance between the junction side and the ambient package, T j and T a are the junction temperature and ambient temperature, respectively, P(T j ) denotes temperaturedependent P total , which can be calculated by (1).…”

“…The term inside the square root has to be positive or zero for real solutions to suppress thermal runaways. In such a case, the solution of ( 14) can yield two results for the quadratic equation, and the larger one is omitted due to its metastable state which would be alternated by small perturbation [28].…”

“…Due to a small temperature difference between the two sides of Al cap, the thermal resistance of Al cap can be omitted for the first-order analysis [28]. Hence, the total thermal resistance of the C4 structure is given by…”